Lines Matching refs:S0
98 m_assembler.adds_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
114 ARMWord w = m_assembler.getImm(imm.m_value, ARMRegisters::S0, true);
125 m_assembler.and_r(ARMRegisters::S0, shift_amount, w);
127 m_assembler.movs_r(dest, m_assembler.lsl_r(dest, ARMRegisters::S0));
138 move(src, ARMRegisters::S0);
139 src = ARMRegisters::S0;
146 move(imm, ARMRegisters::S0);
147 m_assembler.muls_r(dest, src, ARMRegisters::S0);
167 m_assembler.orrs_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
174 m_assembler.and_r(ARMRegisters::S0, shift_amount, w);
176 m_assembler.movs_r(dest, m_assembler.asr_r(dest, ARMRegisters::S0));
191 m_assembler.subs_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
214 m_assembler.eors_r(dest, dest, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
239 m_assembler.ldr_un_imm(ARMRegisters::S0, 0);
240 m_assembler.dtr_ur(true, dest, address.base, ARMRegisters::S0);
253 m_assembler.add_r(ARMRegisters::S0, address.base, m_assembler.lsl(address.index, address.scale));
255 m_assembler.ldrh_u(dest, ARMRegisters::S0, ARMAssembler::getOp2Byte(address.offset));
257 m_assembler.ldrh_d(dest, ARMRegisters::S0, ARMAssembler::getOp2Byte(-address.offset));
263 m_assembler.ldr_un_imm(ARMRegisters::S0, 0);
264 m_assembler.dtr_ur(false, src, address.base, ARMRegisters::S0);
289 m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address));
290 m_assembler.dtr_u(false, src, ARMRegisters::S0, 0);
295 m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address));
300 m_assembler.dtr_u(false, ARMRegisters::S1, ARMRegisters::S0, 0);
321 move(imm, ARMRegisters::S0);
322 push(ARMRegisters::S0);
345 m_assembler.mov_r(ARMRegisters::S0, reg1);
347 m_assembler.mov_r(reg2, ARMRegisters::S0);
371 m_assembler.ldr_un_imm(ARMRegisters::S0, right.m_value);
372 m_assembler.cmp_r(left, ARMRegisters::S0);
374 m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARMRegisters::S0));
419 load16(left, ARMRegisters::S0);
421 m_assembler.cmp_r(ARMRegisters::S0, ARMRegisters::S1);
435 ARMWord w = m_assembler.getImm(mask.m_value, ARMRegisters::S0, true);
437 m_assembler.bics_r(ARMRegisters::S0, reg, w & ~ARMAssembler::OP2_INV_IMM);
487 move(src1, ARMRegisters::S0);
488 src1 = ARMRegisters::S0;
510 move(imm, ARMRegisters::S0);
511 mull32(ARMRegisters::S0, src, dest);
578 m_assembler.cmp_r(left, m_assembler.getImm(right.m_value, ARMRegisters::S0));
608 m_assembler.tst_r(ARMRegisters::S1, m_assembler.getImm(mask.m_value, ARMRegisters::S0));
621 m_assembler.add_r(dest, src, m_assembler.getImm(imm.m_value, ARMRegisters::S0));
629 m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address.m_ptr));
630 m_assembler.dtr_u(false, ARMRegisters::S1, ARMRegisters::S0, 0);
638 m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address.m_ptr));
639 m_assembler.dtr_u(false, ARMRegisters::S1, ARMRegisters::S0, 0);
644 m_assembler.ldr_un_imm(ARMRegisters::S0, reinterpret_cast<ARMWord>(address));
645 m_assembler.dtr_u(true, dest, ARMRegisters::S0, 0);
693 dataLabel = moveWithPatch(initialRightValue, ARMRegisters::S0);
694 Jump jump = branch32(cond, ARMRegisters::S0, ARMRegisters::S1, true);
728 m_assembler.ldr_un_imm(ARMRegisters::S0, (ARMWord)address);
729 m_assembler.fdtr_u(true, dest, ARMRegisters::S0, 0);
810 m_assembler.cmp_r(ARMRegisters::S0, ARMRegisters::S0, ARMAssembler::VS);
845 m_assembler.mov_r(ARMRegisters::S0, ARMAssembler::getOp2(0));
846 convertInt32ToDouble(ARMRegisters::S0, srcDest);
882 m_assembler.add_r(ARMRegisters::S0, base, ARMAssembler::OP2_IMM | (offset >> 12) | (10 << 8));
884 m_assembler.dtr_u(true, ARMRegisters::pc, ARMRegisters::S0, offset & 0xfff);
886 ARMWord reg = m_assembler.getImm(offset, ARMRegisters::S0);
896 m_assembler.sub_r(ARMRegisters::S0, base, ARMAssembler::OP2_IMM | (offset >> 12) | (10 << 8));
898 m_assembler.dtr_d(true, ARMRegisters::pc, ARMRegisters::S0, offset & 0xfff);
900 ARMWord reg = m_assembler.getImm(offset, ARMRegisters::S0);
