Lines Matching full:clock
127 /* Enable SPI Controller, 16.67MHz SPI Clock */
211 /* Switch between internal (PCI) and external clock oscillator */
219 /* Switch to desired clock, and reset the PLL. */
232 /* Configure PCI-SPI Host Controller's SPI Clock rate as a divisor into the
233 * base clock rate. The base clock is either the PCI Clock (33MHz) or the
234 * external clock oscillator at U17 on the PciSpiHost.
257 /* For FPGA Rev >= 5, the use of an external clock oscillator is supported.
258 * If the oscillator is populated, use it to provide the SPI base clock,
259 * otherwise, default to the PCI clock as the SPI base clock.
263 /* Enable the External Clock Oscillator as PLL clock source. */
265 sd_err(("%s: error switching to external clock\n", __FUNCTION__));
268 /* Check to make sure the external clock is running. If not, then it
269 * is not populated on the card, so we will default to the PCI clock.
274 /* Switch back to the PCI clock as the clock source. */
276 sd_err(("%s: error switching to external clock\n", __FUNCTION__));
284 * 1. Force PCI clock as clock source, using sd_divisor of 0.
286 * 3. Set desired sd_divisor (will switch to external oscillator as clock source.
292 /* Select PCI clock as the clock source. */
294 sd_err(("%s: error switching to external clock\n", __FUNCTION__));
300 /* If using the external oscillator, read the clock frequency from the controller
322 sd_err(("%s: no external oscillator installed, using PCI clock.\n", __FUNCTION__));
326 /* Convert the SPI Clock frequency to BCD format. */
369 /* Wait for clock to settle. */
