Lines Matching refs:x02
64 #define SDIOD_CCCR_IOEN 0x02
94 #define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */
98 #define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */
119 #define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */
129 #define SDIO_CAP_SMB 0x02 /* support multi-block transfer */
134 #define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */
138 #define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */
142 #define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */
178 #define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */
212 #define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */
322 #define SD_RSP_MR1_RFU1 0x02
332 #define SD_RSP_R5_FUNC_NUM_ERROR 0x02
