Lines Matching full:mask
48 #define SET_SBREG(sii, r, mask, val) \
49 W_SBREG((sii), (r), ((R_SBREG((sii), (r)) & ~(mask)) | (val)))
78 sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
110 sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */
259 sb_core_cflags_wo(si_t *sih, uint32 mask, uint32 val)
268 ASSERT((val & ~mask) == 0);
270 /* mask and set */
271 w = (R_SBREG(sii, &sb->sbtmstatelow) & ~(mask << SBTML_SICF_SHIFT)) |
278 sb_core_cflags(si_t *sih, uint32 mask, uint32 val)
287 ASSERT((val & ~mask) == 0);
289 /* mask and set */
290 if (mask || val) {
291 w = (R_SBREG(sii, &sb->sbtmstatelow) & ~(mask << SBTML_SICF_SHIFT)) |
304 sb_core_sflags(si_t *sih, uint32 mask, uint32 val)
313 ASSERT((val & ~mask) == 0);
314 ASSERT((mask & ~SISF_CORE_BITS) == 0);
316 /* mask and set */
317 if (mask || val) {
318 w = (R_SBREG(sii, &sb->sbtmstatehigh) & ~(mask << SBTMH_SISF_SHIFT)) |
342 * Switch to 'coreidx', issue a single arbitrary 32bit register mask&set operation,
351 sb_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
364 ASSERT((val & ~mask) == 0);
414 /* mask and set */
415 if (mask || val) {
417 w = (R_SBREG(sii, r) & ~mask) | val;
420 w = (R_REG(sii->osh, r) & ~mask) | val;
580 * If the user has provided an interrupt mask enabled function,
