Lines Matching full:power
661 \&\fB\-mpower \-mno\-power \-mpower2 \-mno\-power2
670 \&\-malign\-power \-malign\-natural
5058 Align the start of functions to the next power-of-two greater than
5067 Some assemblers only support this flag when \fIn\fR is a power of two;
5079 Align all branch targets to a power-of-two boundary, skipping up to
5100 Align loops to a power-of-two boundary, skipping up to \fIn\fR bytes
5117 Align branch targets to a power-of-two boundary, for branch targets
8723 Low power version of Intel Pentium3 \s-1CPU\s0 with \s-1MMX\s0, \s-1SSE\s0 and \s-1SSE2\s0 instruction set
10624 .IP "\fB\-mno\-power\fR" 4
10625 .IX Item "-mno-power"
10660 \&\s-1RS/6000\s0 and PowerPC. The \fI\s-1POWER\s0\fR instruction set are those
10668 register is included in processors supporting the \s-1POWER\s0 architecture.
10678 are found only in the \s-1POWER\s0 architecture and to use the \s-1MQ\s0 register.
10679 Specifying \fB\-mpower2\fR implies \fB\-power\fR and also allows \s-1GCC\s0
10681 not the original \s-1POWER\s0 architecture.
10709 If you specify both \fB\-mno\-power\fR and \fB\-mno\-powerpc\fR, \s-1GCC\s0
10724 assembler mnemonics defined for the \s-1POWER\s0 architecture. Instructions
10749 generated under this option will run on any \s-1POWER\s0 or PowerPC processor.
10754 \&\fB\-mcpu=power\fR, \fB\-mcpu=power2\fR, \fB\-mcpu=powerpc\fR, and
10755 \&\fB\-mcpu=powerpc64\fR specify generic \s-1POWER\s0, \s-1POWER2\s0, pure 32\-bit
10967 .IP "\fB\-malign\-power\fR" 4
10968 .IX Item "-malign-power"
10973 The option \fB\-malign\-power\fR instructs \s-1GCC\s0 to follow the ABI-specified
10976 On 64\-bit Darwin, natural alignment is the default, and \fB\-malign\-power\fR
10995 instructions are generated by default on \s-1POWER\s0 systems, and not
11009 \&\s-1POWER\s0 systems, and not generated on PowerPC systems. Do not use
12710 holes. When a value is specified (which must be a small power of two), pack
