| /external/srec/srec/Semproc/src/ |
| ExpressionParser.c | 350 LCHAR *operands[MAX_RHS_IDENTIFIERS]; local
373 CHKLOG(rc, ST_getKeyValue(symtable, self->identifiers[i], &operands[i]));
379 p = operands[i] = &self->identifiers[i][1];
407 CHKLOG(rc, (*self->pfunction)(self->functionName, operands, self->idCount, self->userData, result, &resultLen));
417 CHKLOG(rc, ST_putKeyValue(symtable, self->lhs, operands[0]));
|
| /dalvik/dx/src/com/android/dx/ssa/ |
| PhiInsn.java | 41 * {@code non-null;} operands of the instruction; built up by
44 private final ArrayList<Operand> operands = new ArrayList<Operand>(); field in class:PhiInsn
50 * Constructs a new phi insn with no operands.
81 * Updates the TypeBearers of all the sources (phi operands) to be
85 * Note that local association of operands are preserved in this step.
90 for (Operand o : operands) {
129 operands.add(new Operand(registerSpec, predBlock.getIndex(),
144 return operands.get(sourcesIndex).blockIndex;
188 if (operands.size() == 0) {
193 int szSources = operands.size()
[all...] |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/ |
| tree-ssa-sccvn.h | 27 /* N-ary operations in the hashtable consist of length operands, an
62 /* Reference operands only exist in reference operations structures.
63 They consist of an opcode, type, and some number of operands. For
64 a given opcode, some, all, or none of the operands may be used.
65 The operands are there to store the information that makes up the
84 the operation, and a collection of operands that make up the
86 of operands, they access the same memory location. We also store
96 VEC (vn_reference_op_s, heap) *operands; member in struct:vn_reference_s
|
| /external/bluetooth/bluez/audio/ |
| control.c | 91 /* operands in passthrough commands */
348 const unsigned char *operands,
357 if (operands[0] & 0x80) {
366 if ((operands[0] & 0x7F) == key_map[i].avrcp) {
375 operands[0] & 0x7F, status);
453 unsigned char buf[1024], *operands; local
493 operands = buf + sizeof(struct avctp_header) + sizeof(struct avrcp_header);
497 "opcode 0x%02X, %d operands",
513 handle_panel_passthrough(control, operands, operand_count);
527 operands[0] = 0x07
934 uint8_t *operands = &buf[AVCTP_HEADER_LENGTH + AVRCP_HEADER_LENGTH]; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 49 * r0, r1, r2, r3 to hold operands/results
53 * r0, r1, r2, r3, r8, r9, r10, r11, r12, r14 for operands/results
55 * s16-s31/d8-d15 for operands/results
751 int operands[4]; \/\/ [0..3] = [dest, src1, src2, extra] member in struct:ArmLIR
[all...] |
| /external/qemu/ |
| ppc-dis.c | 53 operands are zeroes. */
59 match (and are presumably filled in by operands). */
68 operand table. They appear in the order which the operands must
70 unsigned char operands[8]; member in struct:powerpc_opcode
173 /* The operands table is an array of struct powerpc_operand. */
198 operand value is legal, *ERRMSG will be unchanged (most operands
226 the operands field of the powerpc_opcodes table. */
244 operands fields are identical. The assembler should call the
252 store instructions which want their operands to look like
287 assembler must count the number of operands remaining on the line
330 unsigned int operands; member in struct:powerpc_macro
[all...] |
| /prebuilt/sdk/tools/lib/ |
| dx.jar | |
