| /external/v8/src/mips/ |
| macro-assembler-mips.h | 60 Register r1 = zero_reg, const Operand& r2 = Operand(zero_reg));
63 Register r1 = zero_reg, const Operand& r2 = Operand(zero_reg));
66 Register r1 = zero_reg, const Operand& r2 = Operand(zero_reg));
69 Register r1 = zero_reg, const Operand& r2 = Operand(zero_reg));
72 Register r1 = zero_reg, const Operand& r2 = Operand(zero_reg));
[all...] |
| register-allocator-mips-inl.h | 49 0, // zero_reg
89 zero_reg,
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| macro-assembler-mips.cc | 318 addiu(at, zero_reg, -1); // Fill at with ones.
330 addiu(rd, zero_reg, j.imm32_);
332 ori(rd, zero_reg, j.imm32_);
347 addiu(rd, zero_reg, j.imm32_);
350 ori(rd, zero_reg, j.imm32_);
451 bne(scratch, zero_reg, offset);
455 beq(scratch, zero_reg, offset);
459 bne(scratch, zero_reg, offset);
463 beq(scratch, zero_reg, offset);
469 bne(scratch, zero_reg, offset)
[all...] |
| assembler-mips.cc | 48 const Register zero_reg = { 0 }; member in namespace:v8::internal
120 0, // zero_reg
159 zero_reg,
575 beq(zero_reg, zero_reg, offset);
580 bgezal(zero_reg, offset);
600 GenInstrImmediate(BGTZ, rs, zero_reg, offset);
605 GenInstrImmediate(BLEZ, rs, zero_reg, offset);
631 GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR)
[all...] |
| full-codegen-mips.cc | 91 return MemOperand(zero_reg, 0); // UNIMPLEMENTED RETURN
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| assembler-mips.h | 93 extern const Register zero_reg;
362 void nop() { sll(zero_reg, zero_reg, 0); }
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| simulator-mips.h | 110 zero_reg = 0, enumerator in enum:assembler::mips::Simulator::Register
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| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 148 __ ori(t0, zero_reg, 0);
202 __ addi(v0, zero_reg, 0x7421); // 0x00007421
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