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  /external/kernel-headers/original/asm-arm/arch/
fpga.h 161 #define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */
164 #define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */
  /hardware/ti/wlan/wl1271/Txn/
TxnQueue.h 115 * Called by DrvMain (future - by Chip-Manager).
134 * Called by DrvMain (future - by Chip-Manager).
  /external/grub/netboot/
cs89x0.c 192 /* Turn on the chip auto detection of 10BT/ AUI */
200 This would not be necessary for the sparrow chip but is
251 /* Test to see if the chip has allocated memory for the packet */
327 /* Wait until the chip is reset */
383 /* Test to see if the chip has allocated memory for the packet */
475 /* get the chip type */
via-rhine.c 34 Threshold is bytes transferred to chip before transmission starts. */
541 Boards with this chip are functional only in a bus-master PCI slot.
564 open() time and passes the skb->data field to the chip as receive data
613 The chip does not handle unaligned transmit or receive buffers, resulting
616 The chip does not pad to minimum transmit length.
986 /* Stop the chip's Tx and Rx processes. */
1018 /* Soft reset the chip. */
tulip.c 19 based on the Macronix MX987x5 chip, such as the SOHOware Fast
21 model FA310X, based on the LC82C168 chip is supported.
86 chip. This should also support Lite-On LC82C168 boards.
340 #define EE_CS 0x01 /* EEPROM chip select. */
341 #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */
344 #define EE_DATA_READ 0x08 /* EEPROM chip data out. */
359 The ASIX chip works only in chained mode.
    [all...]
otulip.c 352 /* wakeup chip */
355 /* Stop the chip's Tx and Rx processes. */
epic100.h 145 /* Bytes transferred to chip before transmission starts. */
w89c840.c 47 * This is the etherboot driver for cards based on Winbond W89c840F chip.
321 /* Reset the chip to erase previous misconfiguration.
533 /* Work around horrible bug in the chip by marking the queue as full
599 /* Stop the chip's Tx and Rx processes. */
664 /* Reset the chip to erase previous misconfiguration.
tiara.c 10 Fujitsu MB86960 spec sheet (different chip but same family)
  /external/kernel-headers/original/linux/
i2c.h 123 * & seek for the presence of the chip(s) it supports. If found, it
150 * i2c_client identifies a single device (i.e. chip) that is connected to an
156 unsigned short addr; /* chip address - NOTE: 7bit */
261 #define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */
368 #define I2C_M_TEN 0x10 /* we have a ten bit chip address */
515 # name "' chip")
msm_kgsl.h 48 /* chip revision id
serial_reg.h 47 * Note: The FIFO trigger levels are chip specific:
207 * The Intel XScale on-chip UARTs define these bits
  /hardware/ti/wlan/wl1271/TWD/FW_Transfer/
HwInit.c 40 /* firmware download process. It shall perform Hard Reset the chip */
326 /* Chip ID */
681 WLAN_OS_REPORT(("CHIP VERSION... set 1273 chip top registers\n"));
760 * end of CHIP init seq.
770 /* Read the CHIP ID to get an indication that the bus is TI_OK */
794 WLAN_OS_REPORT (("Error!! Found unknown Chip Id = 0x%x\n", pHwInit->uChipId));
    [all...]
  /system/wlan/ti/wilink_6_1/TWD/FW_Transfer/
HwInit.c 40 /* firmware download process. It shall perform Hard Reset the chip */
310 /* Chip ID */
646 WLAN_OS_REPORT(("CHIP VERSION... set 1273 chip top registers\n"));
721 * end of CHIP init seq.
731 /* Read the CHIP ID to get an indication that the bus is TI_OK */
757 WLAN_OS_REPORT (("Error!! Found unknown Chip Id = 0x%x\n", pHwInit->uChipId));
    [all...]
  /system/wlan/ti/sta_dk_4_0_4_32/common/src/core/sme/configMgr/
configMgr.c 140 OUTPUT: pMac- MAC address of the device as read from the chip
179 OUTPUT: pMac- MAC address of the device as read from the chip
225 OUTPUT: pMac- MAC address of the device as read from the chip
275 If the the driver was in IDLE state, it sends a 'WakeUp' command to the chip.
329 If the the driver was in RUNNING state, it sends a 'Sleep' command to the chip.
    [all...]
  /frameworks/base/core/java/android/bluetooth/
ScoSocket.java 31 * socket - this is managed by the hardware link to the Bluetooth Chip. This
  /hardware/ti/omap3/dspbridge/inc/
cfgdefs.h 136 UINT uChipType; /* DSP chip type. */
  /ndk/docs/
CPU-ARM-NEON.TXT 26 (the latter are mapped to the same chip area than the FPU ones),
  /system/wlan/ti/sta_dk_4_0_4_32/common/src/BusAccess/Shm_Common/
shmBus.h 90 UINT32 uChipId; /* Chip ID */
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/config/arm/
arm.h 367 /* Nonzero if this chip supports the ARM Architecture 3M extensions. */
370 /* Nonzero if this chip supports the ARM Architecture 4 extensions. */
373 /* Nonzero if this chip supports the ARM Architecture 4T extensions. */
376 /* Nonzero if this chip supports the ARM Architecture 5 extensions. */
379 /* Nonzero if this chip supports the ARM Architecture 5E extensions. */
382 /* Nonzero if this chip supports the ARM Architecture 6 extensions. */
388 /* Nonzero if this chip can benefit from load scheduling. */
394 /* Nonzero if this chip is a StrongARM. */
397 /* Nonzero if this chip is a Cirrus variant. */
400 /* Nonzero if this chip supports Intel XScale with Wireless MMX technology. *
    [all...]
  /external/kernel-headers/original/linux/mtd/
mtd.h 189 /* Chip-supported device locking */
  /hardware/broadcom/wlan/bcm4329/src/include/
bcmsdh.h 205 extern void bcmsdh_chipinfo(void *sdh, uint32 chip, uint32 chiprev);
siutils.h 47 uint chip; member in struct:si_pub
  /hardware/ti/wlan/wl1271/stad/src/Sta_Management/
StaCap.c 128 * \brief verify if HT enable\disable at the STA according to 11n_Enable init flag and Chip type
  /system/wlan/ti/sta_dk_4_0_4_32/common/src/TNETW_Driver/FW_Transfer/HwInit/
HwInit.c 41 /* firmware download process. It shall perform Hard Reset the chip */

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