| /dalvik/vm/mterp/armv5te/ |
| OP_IPUT_QUICK.S | 7 FETCH(r1, 1) @ r1<- field byte offset
|
| OP_IPUT_WIDE_QUICK.S | 12 FETCH(r3, 1) @ r3<- field byte offset
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| OP_MONITOR_EXIT.S | 13 EXPORT_PC() @ before fetch: export the PC
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| OP_APUT_OBJECT.S | 5 * Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
9 FETCH(r0, 1) @ r0<- CCBB
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| OP_INVOKE_DIRECT.S | 17 FETCH(r1, 1) @ r1<- BBBB
19 FETCH(r10, 2) @ r10<- GFED or CCCC
|
| OP_INVOKE_VIRTUAL.S | 13 FETCH(r1, 1) @ r1<- BBBB
15 FETCH(r10, 2) @ r10<- GFED or CCCC
|
| header.S | 103 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
108 * Fetch the next instruction from the specified offset. Advances rPC
129 * Fetch the next instruction from an offset specified by _reg. Updates
141 * Fetch a half-word code unit from an offset past the current PC. The
146 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)]
150 * Fetch one byte from an offset past the current PC. Pass in the same
151 * "_count" as you would for FETCH, and an additional 0/1 indicating which
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_IGET_QUICK.S | 6 FETCH(r1, 1) @ r1<- field byte offset
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| OP_IGET_WIDE_QUICK.S | 5 FETCH(r1, 1) @ r1<- field byte offset
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| OP_IPUT_QUICK.S | 6 FETCH(r1, 1) @ r1<- field byte offset
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| OP_IPUT_WIDE_QUICK.S | 11 FETCH(r3, 1) @ r3<- field byte offset
|
| /dalvik/vm/mterp/c/ |
| OP_NEW_ARRAY.c | 11 ref = FETCH(1);
|
| OP_EXECUTE_INLINE.c | 25 ref = FETCH(1); /* inline call "ref" */
26 vdst = FETCH(2); /* 0-4 register indices */
|
| opcommon.c | 78 regs = FETCH(1); \
102 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
118 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
142 srcRegs = FETCH(1); \
178 srcRegs = FETCH(1); \
191 vsrc2 = FETCH(1); \
224 litInfo = FETCH(1); \
259 litInfo = FETCH(1); \
313 srcRegs = FETCH(1); \
350 srcRegs = FETCH(1);
[all...] |
| /dalvik/vm/mterp/x86/ |
| zcmp.S | 13 movswl 2(rPC),rINST_FULL # fetch signed displacement
|
| /dalvik/libcore/luni/src/main/java/java/net/ |
| CacheResponse.java | 28 * getHeaders()} to fetch the response headers.
43 * @return an {@code InputStream} which can be used to fetch the response
|
| /dalvik/vm/mterp/portable/ |
| stubdefs.c | 18 * instruction fetch/computed goto.
30 inst = FETCH(0); \
|
| entry.c | 106 FINISH(0); /* fetch and execute first instruction */
112 /* fetch the next 16 bits from the instruction stream */
113 inst = FETCH(0);
|
| /dalvik/vm/mterp/x86-atom/ |
| OP_INVOKE_SUPER_QUICK.S | 26 FETCH 2, %edx # %edx<- GFED or CCCC
32 FETCH 1, %ecx # %ecx<- method index
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| OP_PACKED_SWITCH.S | 35 FETCH 1, %ecx # %ecx<- BBBBlo
36 FETCH 2, %edx # %edx<- BBBBhi
|
| header.S | 144 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
152 * Fetch the next instruction from the specified offset. Advances rPC
166 * Fetch the next instruction from an offset specified by _reg. Updates
177 * Fetch a half-word code unit from an offset past the current PC. The
183 .macro FETCH _count _reg
188 * Fetch a half-word code unit from an offset past the current PC. The
198 * Fetch the first byte from an offset past the current PC. The
209 * Fetch the second byte from an offset past the current PC. The
220 * Fetch the second byte from an offset past the current PC. The
231 * Fetch one byte from an offset past the current PC. Pass in the sam
[all...] |
| OP_EXECUTE_INLINE.S | 31 FETCH 1, %ecx # %ecx<- BBBB
48 FETCH 2, %edx # %edx<- FEDC
83 FFETCH_ADV 3, %eax # %eax<- next instruction hi; fetch, advance
|
| /dalvik/libdex/ |
| InstrUtils.c | 1038 #define FETCH(_offset) (insns[(_offset)])
1077 pDec->vA = (s2) FETCH(1); // sign-extend 16-bit value
1083 pDec->vB = FETCH(1);
1088 pDec->vB = (s2) FETCH(1); // sign-extend 16-bit value
1097 pDec->vB = FETCH(1);
1101 pDec->vB = FETCH(1) & 0xff;
1102 pDec->vC = FETCH(1) >> 8;
1106 pDec->vB = FETCH(1) & 0xff;
1107 pDec->vC = (s1) (FETCH(1) >> 8); // sign-extend 8-bit value
1113 pDec->vC = (s2) FETCH(1); // sign-extend 16-bit valu
[all...] |
| /external/oprofile/daemon/ |
| opd_ibs_macro.h | 19 * IBS fetch event flags and values at the MSR level.
88 * derived fetch event.
202 * the fetch latency, which is a 16-bit cycle count, and the fetch page size
206 /** Bits 47:32 IbsFetchLat: instruction fetch latency */
209 /** Bit 50 IbsFetchComp: instruction fetch complete. */
215 /** Bit 52 IbsPhyAddrValid: instruction fetch physical address valid. */
227 /** A fetch is a killed fetch if all the masked bits are clear */
|
| /dalvik/vm/mterp/out/ |
| InterpC-portdbg.c | 297 #define FETCH(_offset) (pc[(_offset)])
300 * Extract instruction byte from 16-bit fetch (_inst is a u2).
453 * instruction fetch/computed goto.
465 inst = FETCH(0); \
611 regs = FETCH(1); \
635 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
651 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
675 srcRegs = FETCH(1); \
711 srcRegs = FETCH(1); \
724 vsrc2 = FETCH(1);
[all...] |
