| /dalvik/vm/mterp/armv6t2/ |
| OP_SHR_LONG_2ADDR.S | 10 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
|
| OP_USHR_LONG_2ADDR.S | 10 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
|
| unopNarrower.S | 15 add r3, rFP, r3, lsl #2 @ r3<- &fp[B]
|
| OP_IGET.S | 18 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
|
| OP_IPUT.S | 18 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
|
| /external/opencore/codecs_v2/audio/gsm_amr/amr_wb/dec/src/ |
| pvamrwbdecoder_basic_op_armv5.h | 69 mov L_var_out, var1, lsl #16
70 mov L_var_aux, var2, lsl #16
86 mov L_var_out, var1, lsl #16
87 mov L_var_aux, var2, lsl #16
|
| /frameworks/base/media/libstagefright/codecs/amrwb/src/ |
| pvamrwbdecoder_basic_op_armv5.h | 69 mov L_var_out, var1, lsl #16
70 mov L_var_aux, var2, lsl #16
86 mov L_var_out, var1, lsl #16
87 mov L_var_aux, var2, lsl #16
|
| /external/opencore/codecs_v2/audio/aac/dec/src/ |
| fxp_mul32_arm_gcc.h | 362 "mov %0, %0, lsl #2\n\t"
382 "add %4, %4, %0, lsl #3\n\t"
403 "sub %4, %4, %0, lsl #3\n\t"
421 "mov %0, %0, lsl #3\n\t"
439 "mov %0, %0, lsl #4\n\t"
455 "mov %0, %0, lsl #5\n\t"
473 "mov %0, %0, lsl #6\n\t"
491 "mov %0, %0, lsl #12\n\t"
509 "mov %0, %0, lsl #17\n\t"
528 "mov %0, %0, lsl #18\n\t
[all...] |
| fxp_mul32_arm_v4_gcc.h | 444 "mov %0, %0, lsl #2\n\t"
464 "add %4, %4, %0, lsl #3\n\t"
485 "sub %4, %4, %0, lsl #3\n\t"
503 "mov %0, %0, lsl #3\n\t"
521 "mov %0, %0, lsl #4\n\t"
537 "mov %0, %0, lsl #5\n\t"
555 "mov %0, %0, lsl #6\n\t"
573 "mov %0, %0, lsl #12\n\t"
591 "mov %0, %0, lsl #17\n\t"
610 "mov %0, %0, lsl #18\n\t
[all...] |
| /frameworks/base/media/libstagefright/codecs/aacdec/ |
| fxp_mul32_arm_gcc.h | 362 "mov %0, %0, lsl #2\n\t"
382 "add %4, %4, %0, lsl #3\n\t"
403 "sub %4, %4, %0, lsl #3\n\t"
421 "mov %0, %0, lsl #3\n\t"
439 "mov %0, %0, lsl #4\n\t"
455 "mov %0, %0, lsl #5\n\t"
473 "mov %0, %0, lsl #6\n\t"
491 "mov %0, %0, lsl #12\n\t"
509 "mov %0, %0, lsl #17\n\t"
528 "mov %0, %0, lsl #18\n\t
[all...] |
| fxp_mul32_arm_v4_gcc.h | 444 "mov %0, %0, lsl #2\n\t"
464 "add %4, %4, %0, lsl #3\n\t"
485 "sub %4, %4, %0, lsl #3\n\t"
503 "mov %0, %0, lsl #3\n\t"
521 "mov %0, %0, lsl #4\n\t"
537 "mov %0, %0, lsl #5\n\t"
555 "mov %0, %0, lsl #6\n\t"
573 "mov %0, %0, lsl #12\n\t"
591 "mov %0, %0, lsl #17\n\t"
610 "mov %0, %0, lsl #18\n\t
[all...] |
| /external/skia/include/core/ |
| SkFixed.h | 179 asm("movs %1, %3, lsl #1 \n"
182 "mov %2, %3, lsl #8 \n"
197 "orr %0, %0, %2, lsl #16 \n"
209 "add %0, %0, %3, lsl #16 \n"
221 "orr %0, %0, %2, lsl #2 \n"
|
| /external/v8/src/arm/ |
| builtins-arm.cc | 270 Operand(array_size, LSL, kPointerSizeLog2));
364 __ mov(r2, Operand(r0, LSL, kSmiTagSize)); // Convet argc to a smi.
505 __ str(r1, MemOperand(sp, r0, LSL, kPointerSizeLog2));
520 __ mov(r0, Operand(r0, LSL, kSmiTagSize));
589 __ add(r6, r4, Operand(r3, LSL, kPointerSizeLog2)); // End of object.
662 __ add(r6, r2, Operand(r3, LSL, kPointerSizeLog2)); // End of object.
742 __ ldr(ip, MemOperand(r2, r3, LSL, kPointerSizeLog2 - 1));
809 __ add(sp, sp, Operand(r1, LSL, kPointerSizeLog2 - 1));
858 __ add(r2, r4, Operand(r3, LSL, kPointerSizeLog2));
[all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-armv4t.S | 140 * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
177 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6
178 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6
179 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6
184 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
185 #define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
196 add _reg, rFP, _vreg, lsl #2
479 add r3, rFP, r3, lsl #2 @ r3<- &fp[B]
480 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
496 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB
[all...] |
| InterpAsm-armv5te.S | 140 * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
177 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6
178 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6
179 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6
184 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
185 #define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
196 add _reg, rFP, _vreg, lsl #2
479 add r3, rFP, r3, lsl #2 @ r3<- &fp[B]
480 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
496 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB
[all...] |
| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_STRING_COMPARETO.S | 43 add r2, r2, r4, lsl #1
44 add r1, r1, r9, lsl #1
|
| /dalvik/vm/mterp/armv5te/ |
| OP_CMP_LONG.S | 30 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB]
31 add r3, rFP, r3, lsl #2 @ r3<- &fp[CC]
|
| OP_FILLED_NEW_ARRAY.S | 15 ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
61 add r2, rFP, r1, lsl #2 @ r2<- &fp[CCCC]
|
| OP_APUT_OBJECT.S | 19 add r10, r1, r0, lsl #2 @ r10<- arrayObj + index*width
|
| OP_IGET.S | 18 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
|
| OP_INVOKE_DIRECT.S | 20 ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
|
| OP_IPUT.S | 18 ldr r0, [r2, r1, lsl #2] @ r0<- resolved InstField ptr
|
| /external/tremolo/Tremolo/ |
| floor1ARM.s | 54 LDR r5,[r2],r3,LSL #2 @ r5 = *floor r2 = floor+base
60 ADC r5, r6, r5, LSL #17 @ r5 = MULT31_SHIFT15
|
| /external/webkit/JavaScriptCore/assembler/ |
| MacroAssemblerARM.cpp | 72 op2 = m_assembler.lsl(address.index, static_cast<int>(address.scale));
89 m_assembler.orr_r(dest, dest, m_assembler.lsl(ARMRegisters::S0, 16));
|
| /external/opencore/codecs_v2/video/m4v_h263/enc/src/ |
| vlc_encode_inline.h | 138 mov run, run, lsl #1 /* 05/09/02 */
180 mov run, run, lsl #1 /* 09/02/05 */
247 "mov %1, %1, lsl #1\n\t"
282 "mov %1, %1, lsl #1\n\t"
|
