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  /external/v8/src/arm/
assembler-thumb2-inl.h 187 shift_op_ = LSL;
195 shift_op_ == LSL &&
codegen-arm.cc 964 __ mov(r2, Operand(r2, LSL, shift_value));
    [all...]
macro-assembler-arm.cc 185 LSL,
255 mov(scratch, Operand(scratch, LSL, kObjectAlignmentBits));
275 orr(scratch, scratch, Operand(ip, LSL, offset));
316 add(r6, sp, Operand(r0, LSL, kPointerSizeLog2));
324 add(ip, sp, Operand(r0, LSL, kPointerSizeLog2));
    [all...]
ic-arm.cc 124 __ add(t1, t1, Operand(t1, LSL, 1)); // t1 = t1 * 3
127 __ add(t1, t0, Operand(t1, LSL, 2));
578 __ ldr(r0, MemOperand(r3, r0, LSL, kPointerSizeLog2));
721 __ add(r2, r2, Operand(r1, LSL, kPointerSizeLog2));
741 __ mov(r1, Operand(r1, LSL, kSmiTagSize)); // restore tag
750 __ add(r2, r2, Operand(r1, LSL, kPointerSizeLog2 - kSmiTagSize));
774 __ add(r2, r2, Operand(r1, LSL, kPointerSizeLog2 - kSmiTagSize));
stub-cache-arm.cc 55 __ ldr(ip, MemOperand(ip, offset, LSL, 1));
61 __ ldr(offset, MemOperand(ip, offset, LSL, 1));
72 __ ldr(offset, MemOperand(ip, offset, LSL, 1));
232 __ mov(r0, Operand(r0, LSL, kSmiTagSize));
244 __ mov(r0, Operand(r0, LSL, kSmiTagSize));
    [all...]
constants-arm.h 167 LSL = 0, // Logical shift left
  /system/core/libpixelflinger/codeflinger/
GGLAssembler.cpp 377 ADD(AL, 0, tx, tx, reg_imm(ty, LSL, GGL_DITHER_ORDER_SHIFT));
378 ORR(AL, 0, parts.count.reg, tx, reg_imm(parts.count.reg, LSL, 16));
382 MOV(AL, 0, parts.count.reg, reg_imm(parts.count.reg, LSL, 16));
431 ADD(AL, 0, zbase, zbase, reg_imm(Rs, LSL, 1));
446 ADD(AL, 0, parts.covPtr.reg, parts.covPtr.reg, reg_imm(Rx, LSL, 1));
685 MOV(AL, 0, fragment.reg, reg_imm(incoming.reg, LSL, 1));
    [all...]
blending.cpp 448 else if (shift<0) RSB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSL,-shift));
466 else if (shift<0) SUB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSL,-shift));
619 ADD(AL, 0, d.reg, temp, reg_imm(add.reg, LSL, ms-as));
643 ADD(AL, 0, d.reg, src.reg, reg_imm(dst.reg, LSL, shift));
  /external/freetype/include/freetype/config/
ftconfig.h 328 orr a, a, t, lsl #16 /* a |= t << 16 */
358 "orr %0, %2, lsl #16\n\t" /* %0 |= %2 << 16 */
  /dalvik/vm/compiler/codegen/arm/
Assemble.c 582 "ldr", "r!0d,[r!1d, r!2d, LSL #!3d]", 2),
586 "ldrh", "r!0d,[r!1d, r!2d, LSL #!3d]", 2),
590 "ldrsh", "r!0d,[r!1d, r!2d, LSL #!3d]", 2),
594 "ldrb", "r!0d,[r!1d, r!2d, LSL #!3d]", 2),
    [all...]
  /external/openssl/crypto/0.9.9-dev/bn/
armv4-mont.s 17 mov r0,r0,lsl#2 @ rescale r0 for byte count
armv4-mont.pl 68 mov $num,$num,lsl#2 @ rescale $num for byte count
  /external/quake/quake/src/WinQuake/data/
HELP.TXT 77 Drivers, protocol stacks, and versions: (eg., lsl v2.14, exp16odi
  /external/sonivox/arm-hybrid-22k/lib_src/
ARM-E_interpolate_noloop_gnu.s 97 MOV tmp0, tmp0, LSL #6 @ boost 8-bit signal by 36dB
  /external/sonivox/arm-wt-22k/lib_src/
ARM-E_interpolate_noloop_gnu.s 97 MOV tmp0, tmp0, LSL #6 @ boost 8-bit signal by 36dB
  /dalvik/vm/mterp/armv5te/
footer.S 254 lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
491 add r3, rFP, r1, lsl #2 @ r3<- &fp[CCCC]
492 sub r10, r10, r2, lsl #2 @ r10<- "outs" area, for call args
520 add pc, pc, r2, lsl #4 @ computed goto, 4 instrs each
539 ldr r2, [rFP, ip, lsl #2] @ r2<- vD
549 sub r1, r1, r9, lsl #2 @ r1<- newFp (old savearea - regsSize)
553 sub r3, r10, r3, lsl #2 @ r3<- bottom (newsave - outsSize)
    [all...]
  /external/webkit/JavaScriptCore/assembler/
MacroAssemblerARMv7.h 207 m_assembler.lsl(dest, dest, dataTempRegister);
212 m_assembler.lsl(dest, dest, imm.m_value & 0x1f);
783 m_assembler.lsl(addressTempRegister, right, 16);
784 m_assembler.lsl(dataTempRegister, dataTempRegister, 16);
792 m_assembler.lsl(addressTempRegister, addressTempRegister, 16);
    [all...]
  /dalvik/vm/compiler/template/out/
CompilerTemplateAsm-armv5te-vfp.S 243 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
245 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
305 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
308 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
398 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
    [all...]
CompilerTemplateAsm-armv5te.S 243 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
245 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
305 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
308 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
398 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
    [all...]
CompilerTemplateAsm-armv7-a-neon.S 243 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
245 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
305 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
308 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
398 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
    [all...]
CompilerTemplateAsm-armv7-a.S 243 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
245 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
305 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
308 sub r10, r10, r2, lsl #2 @ r10<- bottom (newsave - outsSize)
398 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
    [all...]
  /dalvik/vm/arch/arm/
CallOldABI.S 131 ldr r2, [r6, r3, lsl #2]
  /dalvik/vm/compiler/codegen/arm/Thumb/
Gen.c 224 // We can't implement "add src, src, src, lsl#shift" on Thumb, so we have
  /external/v8/test/cctest/
test-assembler-arm.cc 193 __ mov(r2, Operand(r2, LSL, 2));
  /frameworks/base/libs/audioflinger/
AudioResampler.cpp 438 " mov r4, r4, lsl #2\n" /* <<2 */\
547 " mov r4, r4, lsl #2\n" /* <<2 */\
557 " mov r12, r12, lsl #2\n" /* <<2 */\

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1 2 3 4 5 6 78 91011