/external/opencore/codecs_v2/audio/mp3/dec/src/asm/ |
pvmp3_mdct_18_wm.asm | 68 mov lr,lr,lsl #1 75 add r8,r8,r10,lsl #5 86 add lr,lr,r9,lsl #4 141 add r1,r5,r4,lsl #2 143 ldr r3,[r6,r4,lsl #2] 146 ldr lr,[r7,r4,lsl #2] 152 str r3,[r5,r4,lsl #2] 153 str r2,[r6,r4,lsl #2] 164 ldr lr,[r7,r4,lsl #2] 165 mov r3,r3,lsl # [all...] |
pvmp3_dct_16_gcc.s | 62 mov r3,r3,lsl #3 81 mov r4,r4,lsl #1 100 mov r6,r6,lsl #1 126 mov r12,r12,lsl #2 133 mov r1,r1,lsl #1 144 mov r7,r7,lsl #1 154 mov r3,r3,lsl #1 158 mov r12,r12,lsl #2 162 mov r2,r2,lsl #1 164 mov r4,r4,lsl # [all...] |
/frameworks/base/media/libstagefright/codecs/mp3dec/src/asm/ |
pvmp3_mdct_18_arm.s | 70 mov lr,lr,lsl #1 77 add r8,r8,r10,lsl #5 88 add lr,lr,r9,lsl #4 143 add r1,r5,r4,lsl #2 145 ldr r3,[r6,r4,lsl #2] 148 ldr lr,[r7,r4,lsl #2] 154 str r3,[r5,r4,lsl #2] 155 str r2,[r6,r4,lsl #2] 166 ldr lr,[r7,r4,lsl #2] 167 mov r3,r3,lsl # [all...] |
pvmp3_mdct_18_gcc.s | 68 mov lr,lr,lsl #1 75 add r8,r8,r10,lsl #5 86 add lr,lr,r9,lsl #4 141 add r1,r5,r4,lsl #2 143 ldr r3,[r6,r4,lsl #2] 146 ldr lr,[r7,r4,lsl #2] 152 str r3,[r5,r4,lsl #2] 153 str r2,[r6,r4,lsl #2] 164 ldr lr,[r7,r4,lsl #2] 165 mov r3,r3,lsl # [all...] |
pvmp3_mdct_18_wm.asm | 68 mov lr,lr,lsl #1 75 add r8,r8,r10,lsl #5 86 add lr,lr,r9,lsl #4 141 add r1,r5,r4,lsl #2 143 ldr r3,[r6,r4,lsl #2] 146 ldr lr,[r7,r4,lsl #2] 152 str r3,[r5,r4,lsl #2] 153 str r2,[r6,r4,lsl #2] 164 ldr lr,[r7,r4,lsl #2] 165 mov r3,r3,lsl # [all...] |
pvmp3_dct_16_gcc.s | 62 mov r3,r3,lsl #3 81 mov r4,r4,lsl #1 100 mov r6,r6,lsl #1 126 mov r12,r12,lsl #2 133 mov r1,r1,lsl #1 144 mov r7,r7,lsl #1 154 mov r3,r3,lsl #1 158 mov r12,r12,lsl #2 162 mov r2,r2,lsl #1 164 mov r4,r4,lsl # [all...] |
/external/openssl/patches/ |
arm-asm.patch | 178 + orr $s0,$s0,$t1,lsl#8 179 + orr $s0,$s0,$t2,lsl#16 180 + orr $s0,$s0,$t3,lsl#24 185 + orr $s1,$s1,$t1,lsl#8 186 + orr $s1,$s1,$t2,lsl#16 187 + orr $s1,$s1,$t3,lsl#24 192 + orr $s2,$s2,$t1,lsl#8 193 + orr $s2,$s2,$t2,lsl#16 194 + orr $s2,$s2,$t3,lsl#24 199 + orr $s3,$s3,$t1,lsl# [all...] |
/external/openssl/crypto/0.9.9-dev/sha/ |
sha512-armv4.s | 52 add r2,r1,r2,lsl#7 @ len to point at the end of inp 94 orr r3,r3,r9,lsl#8 96 orr r3,r3,r10,lsl#16 98 orr r3,r3,r11,lsl#24 99 orr r4,r4,r12,lsl#8 100 orr r4,r4,r9,lsl#16 101 orr r4,r4,r10,lsl#24 111 eor r9,r9,r8,lsl#18 112 eor r10,r10,r7,lsl#18 115 eor r9,r9,r8,lsl#1 [all...] |
/external/jpeg/ |
jidctfst.S | 116 sub r4, r0, r4, lsl #1 129 sub r6, r2, r6, lsl #1 140 sub r8, r0, r2, lsl #1 142 sub r6, r4, r6, lsl #1 181 rsb r2, r0, r5, lsl #1 182 rsb r6, r4, r1, lsl #1 228 sub r7, r0, r7, lsl #1 230 sub r6, r1, r6, lsl #1 232 sub r5, r2, r5, lsl #1 234 add r4, r3, r4, lsl # [all...] |
/external/tremolo/Tremolo/ |
mdctLARM.s | 56 MOV r3, r3, LSL #1 115 MOV r3, r3, LSL #1 191 MOV r8, r8, LSL #1 231 MOV r8, r8, LSL #1 301 MOV r2, r2, LSL #1 305 MOV r2, r2, LSL r3 @ r2 = step = 2<<shift 313 ADD r4, r1, r0, LSL #1 @ r4 = aX = in+(n>>1) 364 ADD r4, r1, r0, LSL #1 @ r4 = aX = in+(n>>1) 418 MOV r6, r14,LSL r3 @ r6 = (4<<i)<<shift 437 ADD r1,r1,r0,LSL #1 @ r1 = x2+4 = x + (POINTS>>1 [all...] |
bitwiseARM.s | 60 ORRLT r10,r10,r11,LSL r14 @ r10= Next 32 bits. 62 RSB r14,r14,r14,LSL r1 82 ORRLT r10,r10,r6,LSL r12 @ r10= first bitsLeftInSeg bits+crap 83 RSB r11,r11,r11,LSL r5 @ r11= mask 108 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits 114 RSB r14,r14,r14,LSL r1 123 RSB r14,r14,r14,LSL r1 150 MOV r14,r14,LSL #3 @ r14= length in bits 194 MOV r10,r10,LSL #3 @ r10= bits to backtrk to word align 200 ADDS r2,r2,r12,LSL #3 @ r2 = length in bits after advanc [all...] |
/external/opencore/codecs_v2/video/avc_h264/enc/src/ |
sad_mb_offset.h | 79 x10 = x10 | (x11 << (32 - SHIFT)); /* bic x10, x10, x11, lsl #8 = ~G ~F ~E ~D */ 156 BIC x10, x10, x11, lsl #(32-SHIFT); 158 BIC x11, x11, x12, lsl #(32-SHIFT); 179 BIC x10, x10, x11, lsl #(32-SHIFT); 181 BIC x11, x11, x12, lsl #(32-SHIFT); 247 __asm__ volatile("MVN %0, %0, lsr #8\n\tBIC %0, %0, %1,lsl #24\n\tMVN %1, %1,lsr #8\n\tBIC %1, %1, %2,lsl #24": "=&r"(x10), "=&r"(x11): "r"(x12)); 249 __asm__ volatile("MVN %0, %0, lsr #16\n\tBIC %0, %0, %1,lsl #16\n\tMVN %1, %1,lsr #16\n\tBIC %1, %1, %2,lsl #16": "=&r"(x10), "=&r"(x11): "r"(x12)); 251 __asm__ volatile("MVN %0, %0, lsr #24\n\tBIC %0, %0, %1,lsl #8\n\tMVN %1, %1,lsr #24\n\tBIC %1, %1, %2,lsl #8": "=&r"(x10), "=&r"(x11): "r"(x12)) [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_MUL_LONG.S | 24 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB] 25 add r3, rFP, r3, lsl #2 @ r3<- &fp[CC] 33 add r0, rFP, r0, lsl #2 @ r0<- &fp[AA]
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binopWide.S | 22 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA] 23 add r2, rFP, r2, lsl #2 @ r2<- &fp[BB] 24 add r3, rFP, r3, lsl #2 @ r3<- &fp[CC]
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OP_MOVE_RESULT_WIDE.S | 5 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
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OP_RETURN_WIDE.S | 8 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
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OP_AGET_WIDE.S | 17 add r0, r0, r1, lsl #3 @ r0<- arrayObj + index*width 29 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
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OP_APUT_WIDE.S | 17 add r0, r0, r1, lsl #3 @ r0<- arrayObj + index*width 19 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
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OP_CONST_STRING_JUMBO.S | 11 orr r1, r0, r1, lsl #16 @ r1<- BBBBbbbb 12 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
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OP_MUL_LONG_2ADDR.S | 14 add r1, rFP, r1, lsl #2 @ r1<- &fp[B] 15 add rINST, rFP, r9, lsl #2 @ rINST<- &fp[A]
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/external/skia/src/core/asm/ |
s32a_d565_opaque.S | 40 mov r2, r1, lsl #8 50 mov r3, r1, lsl #16 77 mov r2, ip, lsl #5 79 orr ip, r2, r1, lsl #11
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/frameworks/base/opengl/libagl/ |
fixed_asm.S | 36 movs r1, r0, lsl #1 /* remove bit sign */ 39 mov r2, r0, lsl #8 /* mantissa<<8 */ 51 mov r1, r0, lsl #1 /* remove bit sign */ 55 mov r2, r0, lsl #8 /* mantissa<<8 */
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/dalvik/vm/mterp/armv4t/ |
OP_AGET_WIDE.S | 17 add r0, r0, r1, lsl #3 @ r0<- arrayObj + index*width 30 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
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OP_APUT_WIDE.S | 15 add r0, r0, r1, lsl #3 @ r0<- arrayObj + index*width 17 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
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OP_SGET_WIDE.S | 12 ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr 19 add r1, rFP, r1, lsl #2 @ r1<- &fp[AA]
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