| /external/skia/include/core/ |
| SkFixed.h | 181 "sub %1, %2, %1, lsr #24 \n"
184 "mov %1, %2, lsr %1 \n"
196 "mov %0, %0, lsr #16 \n"
208 "add %0, %2, %0, lsr #16 \n"
220 "mov %0, %0, lsr #30 \n"
|
| /external/tremolo/Tremolo/ |
| dpen.s | 98 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit
123 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit
142 LDRB r14,[r12,r14,LSR #7] @ r14= t[chase+bit+1+(!bit || t[chase]0x0x80)]
153 MOV r6, r6, LSR #1
155 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit
180 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit
200 ADC r12,r8, r14,LSR #15 @ r12= 1+((chase+bit)<<1)+(!bit || t[chase]0x0x8000)
201 ADC r12,r12,r14,LSR #15 @ r12= t + (1+chase+bit+(!bit || t[chase]0x0x8000))<<1
213 MOVS r0, r0, LSR #1 @ r0 = lok>>1 C = bottom bit
298 MOV r8, r8, LSR r2 @ r8 = entry>>s->q_bit
[all...] |
| bitwiseARM.s | 57 MOV r10,r10,LSR r14 @ r10= ptr[0]>>(32-bitsLeftInWord)
81 MOV r10,r10,LSR r14 @ r10= first bitsLeftInWord bits
155 ADD r6,r10,r10,LSR #3 @ r6 = pointer to data
248 MOV r10,r10,LSR r14 @ r10= ptr[0]>>(32-bitsLeftInWord)
273 MOV r10,r10,LSR r14 @ r10= first bitsLeftInWord bits
395 ADD r6,r10,r10,LSR #3 @ r6 = pointer to data
|
| /system/core/libpixelflinger/codeflinger/ |
| texturing.cpp | 99 MOV(AL, 0, end, reg_imm(parts.count.reg, LSR, 16));
163 reg_imm(parts.iterated.reg, LSR, 16));
819 MOV(AL, 0, u, reg_imm(u, LSR, adjust));
834 MOV(AL, 0, u, reg_imm(u, LSR, adjust));
848 MOV(AL, 0, u, reg_imm(u, LSR, adjust));
[all...] |
| blending.cpp | 138 MOV(AL, 0, temp.reg, reg_imm(temp.reg, LSR, temp.l));
148 MOV(AL, 0, fragment.reg, reg_imm(temp.reg, LSR, temp.l));
331 ADD(AL, 0, factor.reg, fb.reg, reg_imm(fb.reg, LSR, fb.s-1));
337 reg_imm(fragment.reg, LSR, fragment.s-1));
343 reg_imm(src_alpha.reg, LSR, src_alpha.s-1));
350 reg_imm(factor.reg, LSR, factor.s-1));
371 MOV(AL, 0, factor.reg, reg_imm(factor.reg, LSR, factor.s-8));
447 if (shift>0) RSB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSR, shift));
465 if (shift>0) SUB(AL, 0, diff.reg, fb.reg, reg_imm(fragment.reg, LSR, shift));
544 MOV(AL, 0, d.reg, reg_imm(vreg, LSR, vshift))
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| memset.S | 62 orr r1, r1, r1, lsr #8
63 orr r1, r1, r1, lsr #16
|
| /dalvik/vm/mterp/armv5te/ |
| OP_CMP_LONG.S | 27 mov r9, rINST, lsr #8 @ r9<- AA
29 mov r3, r0, lsr #8 @ r3<- CC
|
| binopLit8.S | 17 mov r9, rINST, lsr #8 @ r9<- AA
|
| OP_EXECUTE_INLINE_RANGE.S | 19 mov r0, rINST, lsr #8 @ r0<- AA
|
| /external/opencore/codecs_v2/audio/sbc/enc/src/ |
| sbcenc_filter.h | 48 mov tmp1, tmp1, lsr #30
62 mov tmp1, tmp1, lsr #16
|
| /dalvik/vm/mterp/armv4t/ |
| OP_SPUT_WIDE.S | 12 mov r9, rINST, lsr #8 @ r9<- AA
|
| /dalvik/vm/mterp/armv6t2/ |
| OP_IGET.S | 13 mov r0, rINST, lsr #12 @ r0<- B
|
| OP_IGET_WIDE.S | 10 mov r0, rINST, lsr #12 @ r0<- B
|
| OP_IPUT.S | 13 mov r0, rINST, lsr #12 @ r0<- B
|
| OP_IPUT_WIDE.S | 7 mov r0, rINST, lsr #12 @ r0<- B
|
| binop2addr.S | 17 mov r3, rINST, lsr #12 @ r3<- B
|
| binopWide2addr.S | 17 mov r1, rINST, lsr #12 @ r1<- B
|
| /external/kernel-headers/original/asm-arm/ |
| byteorder.h | 39 x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
|
| /external/libffi/src/m68k/ |
| sysv.S | 165 lsr.l #1,%d0
174 lsr.l #2,%d0
184 lsr.l #2,%d0
193 lsr.l #2,%d0
|
| /external/ppp/pppd/ |
| ipv6cp.h | 41 Jean-Luc.Richier@imag.fr, IMAG-LSR.
45 Jean-Luc.Richier@imag.fr, IMAG-LSR.
70 sept laboratoires dont le laboratoire Logiciels, Syst?mes, R?seaux (LSR).
91 The research unit in Software, Systems, Networks (LSR) is member of IMAG.
|
| /external/speex/libspeex/ |
| fixed_arm4.h | 44 "mov %0, %0, lsr #14 \n\t"
57 "mov %0, %0, lsr #15 \n\t"
137 "\tmovs %5, %5, lsr #31 \n"
|
| /frameworks/base/opengl/libagl/ |
| matrix.h | 69 "movs %0, %0, lsr #16 \n"
97 "add %0, %6, %0, lsr #16 \n"
128 "add %0, %8, %0, lsr #16 \n"
284 "movs %0, %0, lsr #16 \n"
317 "movs %0, %0, lsr #16 \n"
|
| /external/opencore/codecs_v2/video/avc_h264/enc/src/ |
| sad_inline.h | 193 AND x7, mask, x7, lsr #1; local
223 ADD x4, x4, x10,lsr #8; /* accumulate high bytes */ \
226 ADD x4, x4, x11,lsr #8; } /* accumulate high bytes */
318 RSBS x11, dmin, x10, lsr #16; local
351 __asm__ volatile("EOR %1, %2, %0\n\tSUBS %0, %2, %0\n\tEOR %1, %1, %0\n\tAND %1, %3, %1, lsr #1\n\tORRCC %1, %1, #0x80000000\n\tRSB %1, %1, %1, lsl #8\n\tADD %0, %0, %1, asr #7\n\tEOR %0, %0, %1, asr #7": "=r"(src1), "=&r"(x7): "r"(src2), "r"(mask));
365 #define sum_accumulate __asm__ volatile("SBC %0, %0, %1\n\tBIC %1, %4, %1\n\tADD %2, %2, %1, lsr #8\n\tSBC %0, %0, %3\n\tBIC %3, %4, %3\n\tADD %2, %2, %3, lsr #8": "=&r" (x5), "=&r" (x10), "=&r" (x4), "=&r" (x11): "r" (x6));
|
| /external/opencore/codecs_v2/video/m4v_h263/enc/src/ |
| sad_inline.h | 198 AND x7, mask, x7, lsr #1; local
228 ADD x4, x4, x10,lsr #8; /* accumulate high bytes */ \
231 ADD x4, x4, x11,lsr #8; } /* accumulate high bytes */
323 RSBS x11, dmin, x10, lsr #16; local
376 "and %0, %4, %0, lsr #1\n\t"
416 "add %2, %2, %1, lsr #8\n\t" \
419 "add %2, %2, %3, lsr #8" \
|
| /system/core/include/private/pixelflinger/ |
| ggl_fixed.h | 115 "movs %[lo], %[lo], lsr %[rshift] \n"
123 "movs %[lo], %[lo], lsr %[rshift] \n"
138 "add %[lo], %[a], %[lo], lsr %[rshift] \n"
145 "add %[lo], %[a], %[lo], lsr %[rshift] \n"
159 "rsb %[lo], %[a], %[lo], lsr %[rshift] \n"
166 "rsb %[lo], %[a], %[lo], lsr %[rshift] \n"
|
