| /external/quake/quake/src/WinQuake/ |
| mplib.cpp | 119 REGISTERS regs;
local
121 regs.d.eax = DPMIAPI_POST_WINDOWS_ORD << 16 | MGENVXD_DEVICE_ID;
122 regs.d.ebx = 0;
123 regs.d.ecx = 0;
124 int386(CHUNNEL_INT, ®s, ®s);
130 REGISTERS regs;
local
132 regs.d.eax = MGENVXD_WAIT_ORD << 16 | MGENVXD_DEVICE_ID;
133 int386(CHUNNEL_INT, ®s, ®s);
139 REGISTERS regs; local
150 REGISTERS regs; local
162 REGISTERS regs; local
173 REGISTERS regs; local
184 REGISTERS regs; local
196 REGISTERS regs; local
208 REGISTERS regs; local
218 REGISTERS regs; local
[all...] |
| /external/kernel-headers/original/asm-x86/ |
| ptrace.h | 39 extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code);
42 * user_mode_vm(regs) determines whether a register set came from user mode.
46 * if they have already ruled out V8086 mode, so user_mode(regs) can be used.
48 static inline int user_mode(struct pt_regs *regs)
50 return (regs->xcs & SEGMENT_RPL_MASK) == USER_RPL;
52 static inline int user_mode_vm(struct pt_regs *regs)
54 return ((regs->xcs & SEGMENT_RPL_MASK) | (regs->eflags & VM_MASK)) >= USER_RPL;
56 static inline int v8086_mode(struct pt_regs *regs)
58 return (regs->eflags & VM_MASK)
[all...] |
| /external/qemu/distrib/sdl-1.2.12/src/video/riscos/ |
| SDL_riscossprite.c | 49 _kernel_swi_regs regs; local
83 regs.r[0] = 256+9;
84 regs.r[1] = (unsigned int)buffer;
85 _kernel_swi(OS_SpriteOp, ®s, ®s);
87 regs.r[0] = 256+15;
88 regs.r[1] = (unsigned int)buffer;
89 regs.r[2] = (unsigned int)&sprite_name;
90 regs.r[3] = 0; /* Palette flag: 0 = no palette */
91 regs.r[4] = width
146 _kernel_swi_regs regs; local
176 _kernel_swi_regs regs; local
214 _kernel_swi_regs regs; local
[all...] |
| SDL_wimppoll.c | 95 _kernel_swi_regs regs; local
107 _kernel_swi(OS_ReadMonotonicTime, ®s, ®s);
108 waitTime += regs.r[0];
120 regs.r[0] = pollMask; /* Poll Mask */
122 if (waitTime < 0) regs.r[0] |= 1;
123 regs.r[1] = (int)message;
124 _kernel_swi(Wimp_Poll, ®s, ®s);
127 regs.r[0] = pollMask
308 _kernel_swi_regs regs; local
[all...] |
| SDL_riscostask.c | 92 _kernel_swi_regs regs; local
102 regs.r[0] = (unsigned int)360; /* Minimum version 3.6 */
103 regs.r[1] = (unsigned int)0x4b534154;
104 regs.r[2] = (unsigned int)task_name;
105 regs.r[3] = (unsigned int)messages;
107 if (_kernel_swi(Wimp_Initialise, ®s, ®s) == 0)
109 wimp_version = regs.r[0];
110 task_handle = regs.r[1];
129 _kernel_swi_regs regs; local
183 _kernel_swi_regs regs; local
273 _kernel_swi_regs regs; local
310 _kernel_swi_regs regs; local
[all...] |
| /external/kernel-headers/original/asm-arm/ |
| ptrace.h | 100 #define user_mode(regs) \
101 (((regs)->ARM_cpsr & 0xf) == 0)
104 #define thumb_mode(regs) \
105 (((regs)->ARM_cpsr & PSR_T_BIT))
107 #define thumb_mode(regs) (0)
110 #define processor_mode(regs) \
111 ((regs)->ARM_cpsr & MODE_MASK)
113 #define interrupts_enabled(regs) \
114 (!((regs)->ARM_cpsr & PSR_I_BIT))
116 #define fast_interrupts_enabled(regs) \
[all...] |
| processor.h | 53 #define nommu_start_thread(regs) do { } while (0)
55 #define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
58 #define start_thread(regs,pc,sp) \
62 memzero(regs->uregs, sizeof(regs->uregs)); \
64 regs->ARM_cpsr = USR_MODE; \
66 regs->ARM_cpsr = USR26_MODE; \
68 regs->ARM_cpsr |= PSR_T_BIT; \
69 regs->ARM_pc = pc & ~1; /* pc */
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/form/ |
| Form23x.java | 44 RegisterSpecList regs = insn.getRegisters(); local
45 return regs.get(0).regString() + ", " + regs.get(1).regString() +
46 ", " + regs.get(2).regString();
65 RegisterSpecList regs = insn.getRegisters(); local
68 (regs.size() == 3) &&
69 unsignedFitsInByte(regs.get(0).getReg()) &&
70 unsignedFitsInByte(regs.get(1).getReg()) &&
71 unsignedFitsInByte(regs.get(2).getReg());
83 RegisterSpecList regs = insn.getRegisters() local
[all...] |
| /external/qemu/distrib/sdl-1.2.12/src/video/ |
| mmx.h | 301 #define mmx_r2r(op, regs, regd) \
304 __asm__ __volatile__ ("movq %%" #regs ", %0" \
307 printf(#op "_r2r(" #regs "=0x%08x%08x, ", \
314 __asm__ __volatile__ (#op " %" #regs ", %" #regd); \
361 #define mmx_r2r(op, regs, regd) \
362 __asm__ __volatile__ (#op " %" #regs ", %" #regd)
380 #define movq_r2r(regs, regd) mmx_r2r(movq, regs, regd)
395 #define movd_r2r(regs, regd) mmx_r2r(movd, regs, regd
[all...] |
| /cts/tools/vm-tests/src/dot/junit/opcodes/if_eq/d/ |
| T_if_eq_1.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eq_10.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eq_12.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eq_4.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eq_5.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eq_7.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eq_8.d | 7 .limit regs 1
14 .limit regs 8
|
| /cts/tools/vm-tests/src/dot/junit/opcodes/if_eqz/d/ |
| T_if_eqz_1.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_10.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_11.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_2.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_3.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_4.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_5.d | 7 .limit regs 1
14 .limit regs 6
|
| T_if_eqz_6.d | 7 .limit regs 1
14 .limit regs 8
|
| T_if_eqz_7.d | 7 .limit regs 1
14 .limit regs 6
|
