| /external/kernel-headers/original/linux/mtd/ |
| flashchip.h | 48 /* NOTE: confusingly, this can be used to refer to more than one chip at a time,
50 the same physical chip when present. */
56 we insist that they're all of the same size, and the chip size
58 it'll make it a damn sight harder to find which chip we want from
59 a given offset, and we'll want to add the per-chip length field
72 wait_queue_head_t wq; /* Wait on here when we're waiting for the chip
82 between partitions of the same physical chip. */
|
| nand.h | 37 * is supported now. If you add a chip with bigger oobsize/page
49 /* Select the chip by setting nCE to low */
137 /* Chip can not auto increment pages */
143 /* Chip has cache program function */
145 /* Chip has copy back function */
147 /* AND Chip which has 4 banks and a confusing page / block
150 /* Chip has a array of 4 pages which can be read without
153 /* Chip requires that BBT is periodically rewritten to prevent
157 /* Chip does not require ready check on read. True
167 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR)
568 struct nand_chip *chip = mtd->priv; local
[all...] |
| cfi.h | 258 struct flchip chips[0]; /* per-chip data structure for each chip */
297 device, according to chip mode and endianness... */
382 device, according to chip mode and endianness... */
435 only interested in one chip (a representative sample) */
451 only interested in one chip (a representative sample) */
484 typedef int (*varsize_frob_t)(struct map_info *map, struct flchip *chip,
|
| /bionic/libc/kernel/common/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /ndk/build/platforms/android-3/arch-arm/usr/include/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /ndk/build/platforms/android-4/arch-arm/usr/include/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /ndk/build/platforms/android-5/arch-arm/usr/include/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /ndk/build/platforms/android-5/arch-x86/usr/include/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /ndk/build/platforms/android-8/arch-arm/usr/include/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /ndk/build/platforms/android-8/arch-x86/usr/include/linux/mtd/ |
| nand.h | 109 #define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
110 #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
111 #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
112 #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
157 struct nand_chip *chip,
160 struct nand_chip *chip,
[all...] |
| /external/qemu/distrib/sdl-1.2.12/src/audio/mint/ |
| SDL_mintaudio_it.S | 92 .chip 68060
96 .chip 68000
105 .chip 68060
109 .chip 68000
166 .chip 68060
170 .chip 68000
179 .chip 68060
183 .chip 68000
242 .chip 68060
246 .chip 6800
[all...] |
| /hardware/broadcom/wlan/bcm4329/src/shared/ |
| hndpmu.c | 47 uint8 sel; /* Chip-specific select value */
67 #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
85 switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
100 PMU_MSG(("No SDIO Drive strength init done for chip %x rev %d pmurev %d\n",
101 sih->chip, sih->chiprev, sih->pmurev));
|
| siutils_priv.h | 74 si_intrsoff_t intrsoff_fn; /* turns chip interrupts off */
75 si_intrsrestore_t intrsrestore_fn; /* restore chip interrupts */
91 si_common_info_t *common_info; /* Common information for all the cores in a chip */
142 (((PCIE(si)) && (si->pub.chip == BCM4311_CHIP_ID) && ((si->pub.chiprev <= 1))) || \
143 ((PCI(si) || PCIE(si)) && (si->pub.chip == BCM4321_CHIP_ID)))
|
| /external/qemu/hw/ |
| devices.h | 12 I2SCodec *tsc210x_codec(uWireSlave *chip);
14 void tsc210x_set_transform(uWireSlave *chip,
16 void tsc210x_key_event(uWireSlave *chip, int key, int down);
|
| /external/kernel-headers/original/linux/ |
| irq.h | 66 * struct irq_chip - hardware interrupt chip descriptor
71 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
72 * @disable: disable the interrupt (defaults to chip->mask if NULL)
77 * @eoi: end of interrupt - chip level
121 * @chip: low level interrupt hardware access
123 * @chip_data: platform-specific per-chip private data for the chip
124 * methods, to allow shared chip implementations
145 struct irq_chip *chip; member in struct:irq_desc
293 * callable via desc->chip->handle_irq(
[all...] |
| capella_cm3602.h | 32 int (*power)(int); /* power to the chip */
|
| /bootable/bootloader/legacy/ |
| README | 6 (containing code useful to a specific cpu, system-on-chip, etc), and
12 mobile device using SEMI's 65002 ARM-based system-on-chip.
|
| /hardware/broadcom/wlan/bcm4329/src/include/ |
| bcmdefs.h | 66 #define CHIPID(chip) (BCMCHIPID)
68 #define CHIPID(chip) (chip)
|
| /external/qemu/distrib/sdl-1.2.12/src/timer/mint/ |
| SDL_vbltimer.S | 127 .chip 68060
131 .chip 68000
140 .chip 68060
144 .chip 68000
|
| /external/grub/netboot/ |
| smc9000.c | 12 * "Features" of the SMC chip:
57 * This sets the SMC91xx chip to its normal state, hopefully from whatever
77 /* this should pause enough for the chip to be happy */
100 * Tests to see if a given ioaddr points to an SMC9xxx chip.
106 * (3) see if I recognize the chip ID in the appropriate register
138 "Probably not a SMC chip\n",
142 * been a SMC chip after all. */
153 /* I don't recognize this chip, so... */
161 /* at this point I'll assume that the chip is an SMC9xxx.
236 /* or isn't there? BAD CHIP! */
[all...] |
| rtl8139.c | 11 - removed support for the 8129 chip (external MII)
72 Threshold is bytes transferred to chip before transmission starts. */
78 #define TX_BUF_SIZE ETH_FRAME_LEN /* FCS is added by the chip */
102 RevisionID=0x5E, /* revision of the RTL8139 chip */
109 CSCR=0x74, /* chip status and configuration register */
199 /* Bring the chip out of low-power mode. */
232 #define EE_CS 0x08 /* EEPROM chip select. */
233 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
236 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
294 /* Give the chip 10ms to finish the reset. *
[all...] |
| epic100.c | 100 /* Soft reset the chip. */
139 /* Reset the chip & bring it out of low-power mode. */
222 /* Pull the chip out of low-power mode, and set for PCI read multiple. */
239 /* Give adress of RX and TX ring to the chip */
243 /* Start the chip's Rx process: receive unicast and broadcast */
261 rx_ring[i].status = RRING_OWN; /* Owned by Epic chip */
330 tx_ring[entry].status = TRING_OWN; /* Pass ownership to the chip. */
394 /* Give the descriptor back to the chip */
415 #define EE_CS 0x02 /* EEPROM chip select. */
416 #define EE_DATA_WRITE 0x08 /* EEPROM chip data in. *
[all...] |
| timer.h | 13 /* Ports for the 8254 timer chip */
|
| /device/htc/passion-common/ |
| media_a1026.mk | 18 # This file describes the use of the A1026 chip by the media
|
| /system/bluetooth/bluedroid/include/bluedroid/ |
| bluetooth.h | 36 * powering down the chip. Will block until power down is complete, and it
|
