Home | History | Annotate | Download | only in arm

Lines Matching refs:info1

132     RegisterInfo *info1 = getRegInfo(cUnit, reg1);
134     assert(info1 && info2 && info1->pair && info2->pair &&
135            (info1->partner == info2->reg) &&
136            (info2->partner == info1->reg));
137     if ((info1->live && info1->dirty) || (info2->live && info2->dirty)) {
138         info1->dirty = false;
141             dvmCompilerS2VReg(cUnit, info1->sReg))
142             info1 = info2;
144                                     dvmCompilerS2VReg(cUnit, info1->sReg) << 2,
145                                     info1->reg, info1->partner);