Lines Matching refs:address
460 int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
465 env->cp15.c6_insn = address;
468 env->cp15.c6_data = address;
481 /* Flush any monitor locks for the specified address. */
496 /* Mark an address for exclusive access. */
506 /* Test if an exclusive address is still exclusive. Returns zero
507 if the address is still exclusive. */
939 static uint32_t get_level1_table_address(CPUState *env, uint32_t address)
943 if (address & env->cp15.c2_mask)
948 table |= (address >> 18) & 0x3ffc;
952 static int get_phys_addr_v5(CPUState *env, uint32_t address, int access_type,
965 table = get_level1_table_address(env, address);
983 phys_addr = (desc & 0xfff00000) | (address & 0x000fffff);
990 table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);
993 table = (desc & 0xfffff000) | ((address >> 8) & 0xffc);
1001 phys_addr = (desc & 0xffff0000) | (address & 0xffff);
1002 ap = (desc >> (4 + ((address >> 13) & 6))) & 3;
1005 phys_addr = (desc & 0xfffff000) | (address & 0xfff);
1006 ap = (desc >> (4 + ((address >> 13) & 6))) & 3;
1011 phys_addr = (desc & 0xfffff000) | (address & 0xfff);
1018 phys_addr = (desc & 0xfffffc00) | (address & 0x3ff);
1039 static int get_phys_addr_v6(CPUState *env, uint32_t address, int access_type,
1053 table = get_level1_table_address(env, address);
1079 phys_addr = (desc & 0xff000000) | (address & 0x00ffffff);
1082 phys_addr = (desc & 0xfff00000) | (address & 0x000fffff);
1089 table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);
1097 phys_addr = (desc & 0xffff0000) | (address & 0xffff);
1101 phys_addr = (desc & 0xfffff000) | (address & 0xfff);
1130 static int get_phys_addr_mpu(CPUState *env, uint32_t address, int access_type,
1137 *phys_ptr = address;
1146 if (((base ^ address) & ~mask) == 0)
1189 static inline int get_phys_addr(CPUState *env, uint32_t address,
1194 if (address < 0x02000000)
1195 address += env->cp15.c13_fcse;
1199 *phys_ptr = address;
1203 return get_phys_addr_mpu(env, address, access_type, is_user, phys_ptr,
1206 return get_phys_addr_v6(env, address, access_type, is_user, phys_ptr,
1209 return get_phys_addr_v5(env, address, access_type, is_user, phys_ptr,
1214 int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address,
1222 ret = get_phys_addr(env, address, access_type, is_user, &phys_addr, &prot);
1226 address &= ~(uint32_t)0x3ff;
1227 return tlb_set_page (env, address, phys_addr, prot, mmu_idx,
1233 env->cp15.c6_insn = address;
1239 env->cp15.c6_data = address;
1450 case 6: /* MMU Fault address / MPU base/size. */
1772 case 6: /* MMU Fault address. */
1878 * controller base address at $rn & ~0xfff and map size of
