Lines Matching refs:Immediate
67 __ xor_(rax, Immediate(0x200000)); // Flip bit 21.
83 __ movq(rax, Immediate(1));
89 __ shl(rcx, Immediate(32));
100 __ movl(rax, Immediate(1));
105 __ or_(rax, Immediate(1 << CPUID));
145 // Load register with immediate 64 and call through a register instructions
509 Immediate src) {
529 Immediate src) {
547 Immediate src) {
569 Immediate src) {
588 Immediate src) {
609 Immediate src) {
627 Immediate src) {
640 Immediate src) {
654 void Assembler::shift(Register dst, Immediate shift_amount, int subcode) {
689 void Assembler::shift_32(Register dst, Immediate shift_amount, int subcode) {
861 void Assembler::cmpb_al(Immediate imm8) {
944 void Assembler::enter(Immediate size) {
1007 void Assembler::imul(Register dst, Register src, Immediate imm) {
1222 void Assembler::movb(Register dst, Immediate imm) {
1275 void Assembler::movl(const Operand& dst, Immediate value) {
1285 void Assembler::movl(Register dst, Immediate value) {
1313 void Assembler::movq(Register dst, Immediate value) {
1349 movq(dst, Immediate(static_cast<int32_t>(value)));
1352 movl(dst, Immediate(static_cast<int32_t>(value)));
1355 // Value cannot be represented by 32 bits, so do a full 64 bit immediate
1376 void Assembler::movq(const Operand& dst, Immediate value) {
1735 void Assembler::push(Immediate value) {
1779 movb(reg, Immediate(cc == always ? 1 : 0));
1855 void Assembler::testb(Register reg, Immediate mask) {
1874 void Assembler::testb(const Operand& op, Immediate mask) {
1908 void Assembler::testl(Register reg, Immediate mask) {
1928 void Assembler::testl(const Operand& op, Immediate mask) {
1961 void Assembler::testq(Register dst, Immediate mask) {
