Lines Matching refs:Immediate
263 class Immediate BASE_EMBEDDED {
265 explicit Immediate(int32_t value) : value_(value) {}
490 void push(Immediate value);
498 void enter(Immediate size);
503 void movb(Register dst, Immediate imm);
513 void movl(const Operand& dst, Immediate imm);
514 // Load a 32-bit immediate value, zero-extended to 64 bits.
515 void movl(Register dst, Immediate imm32);
522 // Sign extends immediate 32-bit value to 64 bits.
523 void movq(Register dst, Immediate x);
528 // Move sign extended immediate to memory location.
529 void movq(const Operand& dst, Immediate value);
530 // New x64 instructions to load a 64-bit immediate into a register.
555 // New x64 instruction to load from an immediate 64-bit pointer into RAX.
577 void addl(Register dst, Immediate src) {
585 void addl(const Operand& dst, Immediate src) {
601 void addq(Register dst, Immediate src) {
605 void addq(const Operand& dst, Immediate src) {
609 void cmpb(Register dst, Immediate src) {
613 void cmpb_al(Immediate src);
627 void cmpb(const Operand& dst, Immediate src) {
631 void cmpw(const Operand& dst, Immediate src) {
635 void cmpw(Register dst, Immediate src) {
663 void cmpl(Register dst, Immediate src) {
667 void cmpl(const Operand& dst, Immediate src) {
683 void cmpq(Register dst, Immediate src) {
687 void cmpq(const Operand& dst, Immediate src) {
703 void and_(Register dst, Immediate src) {
707 void and_(const Operand& dst, Immediate src) {
711 void andl(Register dst, Immediate src) {
719 void andb(Register dst, Immediate src) {
744 void imul(Register dst, Register src, Immediate imm); // dst = src * imm.
780 void or_(Register dst, Immediate src) {
784 void orl(Register dst, Immediate src) {
788 void or_(const Operand& dst, Immediate src) {
792 void orl(const Operand& dst, Immediate src) {
797 void rcl(Register dst, Immediate imm8) {
801 void rol(Register dst, Immediate imm8) {
805 void rcr(Register dst, Immediate imm8) {
809 void ror(Register dst, Immediate imm8) {
821 void sar(Register dst, Immediate shift_amount) {
827 void sarl(Register dst, Immediate shift_amount) {
841 void shl(Register dst, Immediate shift_amount) {
853 void shll(Register dst, Immediate shift_amount) {
857 void shr(Register dst, Immediate shift_amount) {
869 void shrl(Register dst, Immediate shift_amount) {
888 void subq(Register dst, Immediate src) {
892 void subq(const Operand& dst, Immediate src) {
904 void subl(const Operand& dst, Immediate src) {
908 void subl(Register dst, Immediate src) {
912 void subb(Register dst, Immediate src) {
917 void testb(Register reg, Immediate mask);
918 void testb(const Operand& op, Immediate mask);
921 void testl(Register reg, Immediate mask);
922 void testl(const Operand& op, Immediate mask);
925 void testq(Register dst, Immediate mask);
947 void xor_(Register dst, Immediate src) {
951 void xor_(const Operand& dst, Immediate src) {
1164 void emit(Immediate x) { emitl(x.value_); }
1283 void immediate_arithmetic_op(byte subcode, Register dst, Immediate src);
1284 void immediate_arithmetic_op(byte subcode, const Operand& dst, Immediate src);
1288 Immediate src);
1291 Immediate src);
1295 Immediate src);
1298 Immediate src);
1302 Immediate src);
1305 Immediate src);
1308 void shift(Register dst, Immediate shift_amount, int subcode);
1309 void shift_32(Register dst, Immediate shift_amount, int subcode);
