Lines Matching refs:regT0
56 emitLoad(src, regT1, regT0);
59 addSlowCase(branch32(Equal, regT0, Imm32(0)));
61 neg32(regT0);
62 emitStoreInt32(dst, regT0, (dst == src));
72 store32(regT0, payloadFor(dst));
85 stubCall.addArgument(regT1, regT0);
104 emitLoad(op1, regT1, regT0);
106 addJump(branch32(GreaterThanOrEqual, regT0, Imm32(getConstantOperand(op2).asInt32())), target);
108 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
111 addJump(branch32(GreaterThanOrEqual, regT0, regT2), target);
149 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
167 emitLoad(op1, regT1, regT0);
169 addJump(branch32(LessThan, regT0, Imm32(getConstantOperand(op2).asInt32())), target);
171 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
174 addJump(branch32(LessThan, regT0, regT2), target);
212 emitJumpSlowToHot(branchTest32(NonZero, regT0), target);
230 emitLoad(op1, regT1, regT0);
232 addJump(branch32(GreaterThan, regT0, Imm32(getConstantOperand(op2).asInt32())), target);
234 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
237 addJump(branch32(GreaterThan, regT0, regT2), target);
275 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
287 emitLoad(op1, regT1, regT0);
289 lshift32(Imm32(getConstantOperand(op2).asInt32()), regT0);
290 emitStoreInt32(dst, regT0, dst == op1);
294 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
298 lshift32(regT2, regT0);
299 emitStoreInt32(dst, regT0, dst == op1 || dst == op2);
327 emitLoad(op1, regT1, regT0);
329 rshift32(Imm32(getConstantOperand(op2).asInt32()), regT0);
330 emitStoreInt32(dst, regT0, dst == op1);
334 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
338 rshift32(regT2, regT0);
339 emitStoreInt32(dst, regT0, dst == op1 || dst == op2);
369 emitLoad(op, regT1, regT0);
371 and32(Imm32(constant), regT0);
372 emitStoreInt32(dst, regT0, (op == dst));
376 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
379 and32(regT2, regT0);
380 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
410 emitLoad(op, regT1, regT0);
412 or32(Imm32(constant), regT0);
413 emitStoreInt32(dst, regT0, (op == dst));
417 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
420 or32(regT2, regT0);
421 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
451 emitLoad(op, regT1, regT0);
453 xor32(Imm32(constant), regT0);
454 regT0, (op == dst));
458 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
461 xor32(regT2, regT0);
462 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
488 emitLoad(src, regT1, regT0);
491 not32(regT0);
492 emitStoreInt32(dst, regT0, (dst == src));
502 stubCall.addArgument(regT1, regT0);
513 emitLoad(srcDst, regT1, regT0);
519 emitStoreInt32(dst, regT0);
521 addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
522 emitStoreInt32(srcDst, regT0, true);
547 emitLoad(srcDst, regT1, regT0);
553 emitStoreInt32(dst, regT0);
555 addSlowCase(branchSub32(Overflow, Imm32(1), regT0));
556 emitStoreInt32(srcDst, regT0, true);
580 emitLoad(srcDst, regT1, regT0);
583 addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
584 emitStoreInt32(srcDst, regT0, true);
605 emitLoad(srcDst, regT1, regT0);
608 addSlowCase(branchSub32(Overflow, Imm32(1), regT0));
609 emitStoreInt32(srcDst, regT0, true);
651 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
656 addSlowCase(branchAdd32(Overflow, regT2, regT0));
657 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
674 emitLoad(op, regT1, regT0);
676 addSlowCase(branchAdd32(Overflow, Imm32(constant), regT0));
677 emitStoreInt32(dst, regT0, (op == dst));
760 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
765 addSlowCase(branchSub32(Overflow, regT2, regT0));
766 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
783 emitLoad(op, regT1, regT0);
785 addSlowCase(branchSub32(Overflow, Imm32(constant), regT0));
786 emitStoreInt32(dst, regT0, (op == dst));
921 emitLoadPayload(op1, regT0);
923 convertInt32ToDouble(regT0, fpRegT0);
983 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
988 move(regT0, regT3);
989 addSlowCase(branchMul32(Overflow, regT2, regT0));
990 addSlowCase(branchTest32(Zero, regT0));
991 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
1065 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1070 convertInt32ToDouble(regT0, fpRegT0);
1075 branchConvertDoubleToInt32(fpRegT0, regT0, doubleResult, fpRegT1);
1078 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
1191 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1199 emitStoreInt32(dst, regT0, (op1 == dst || op2 == dst));
1238 emitGetVirtualRegisters(op1, regT0, op2, regT2);
1240 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1242 emitFastArithImmToInt(regT0);
1244 lshift32(regT2, regT0);
1246 addSlowCase(branchAdd32(Overflow, regT0, regT0));
1247 signExtend32ToPtr(regT0, regT0);
1249 emitFastArithReTagImmediate(regT0, regT0);
1269 emitGetVirtualRegisters(op1, regT0, op2, regT2);
1274 stubCall.addArgument(regT0);
1287 emitGetVirtualRegister(op1, regT0);
1288 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1290 rshift32(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), regT0);
1292 emitGetVirtualRegisters(op1, regT0, op2, regT2);
1294 Jump lhsIsInt = emitJumpIfImmediateInteger(regT0);
1297 addSlowCase(emitJumpIfNotImmediateNumber(regT0));
1298 addPtr(tagTypeNumberRegister, regT0);
1299 movePtrToDouble(regT0, fpRegT0);
1300 addSlowCase(branchTruncateDoubleToInt32(fpRegT0, regT0));
1303 emitJumpSlowCaseIfNotJSCell(regT0, op1);
1304 addSlowCase(checkStructure(regT0, m_globalData->numberStructure.get()));
1305 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1306 addSlowCase(branchTruncateDoubleToInt32(fpRegT0, regT0));
1307 addSlowCase(branchAdd32(Overflow, regT0, regT0));
1313 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1317 rshift32(regT2, regT0);
1319 signExtend32ToPtr(regT0, regT0);
1323 emitFastArithIntToImmNoCheck(regT0, regT0);
1325 orPtr(Imm32(JSImmediate::TagTypeNumber), regT0);
1340 stubCall.addArgument(regT0);
1355 // We're reloading op1 to regT0 as we can no longer guarantee that
1358 stubCall.addArgument(op1, regT0);
1363 stubCall.addArgument(regT0);
1383 emitGetVirtualRegister(op1, regT0);
1384 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1390 addJump(branch32(GreaterThanOrEqual, regT0, Imm32(op2imm)), target);
1401 emitGetVirtualRegisters(op1, regT0, op2, regT1);
1402 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1405 addJump(branch32(GreaterThanOrEqual, regT0, regT1), target);
1425 Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
1426 addPtr(tagTypeNumberRegister, regT0);
1427 movePtrToDouble(regT0, fpRegT0);
1431 fail1 = emitJumpIfNotJSCell(regT0);
1433 Jump fail2 = checkStructure(regT0, m_globalData->numberStructure.get());
1434 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1456 stubCall.addArgument(regT0);
1459 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
1480 move(Imm32(op1imm), regT0);
1481 convertInt32ToDouble(regT0, fpRegT0);
1500 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
1507 Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
1510 addPtr(tagTypeNumberRegister, regT0);
1512 movePtrToDouble(regT0, fpRegT0);
1517 fail1 = emitJumpIfNotJSCell(regT0);
1523 Jump fail3 = checkStructure(regT0, m_globalData->numberStructure.get());
1525 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1549 stubCall.addArgument(regT0);
1552 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
1568 emitGetVirtualRegister(op1, regT0);
1569 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1575 addJump(branch32(LessThan, regT0, Imm32(op2imm)), target);
1586 emitGetVirtualRegisters(op1, regT0, op2, regT1);
1587 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1590 addJump(branch32(LessThan, regT0, regT1), target);
1610 Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
1611 addPtr(tagTypeNumberRegister, regT0);
1612 movePtrToDouble(regT0, fpRegT0);
1616 fail1 = emitJumpIfNotJSCell(regT0);
1618 Jump fail2 = checkStructure(regT0, m_globalData->numberStructure.get());
1619 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1641 stubCall.addArgument(regT0);
1644 emitJumpSlowToHot(branchTest32(NonZero, regT0), target);
1665 move(Imm32(op1imm), regT0);
1666 convertInt32ToDouble(regT0, fpRegT0);
1685 emitJumpSlowToHot(branchTest32(NonZero, regT0), target);
1692 Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
1695 addPtr(tagTypeNumberRegister, regT0);
1697 movePtrToDouble(regT0, fpRegT0);
1702 fail1 = emitJumpIfNotJSCell(regT0);
1708 Jump fail3 = checkStructure(regT0, m_globalData->numberStructure.get());
1710 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1734 stubCall.addArgument(regT0);
1737 emitJumpSlowToHot(branchTest32(NonZero, regT0), target);
1753 emitGetVirtualRegister(op1, regT0);
1754 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1760 addJump(branch32(GreaterThan, regT0, Imm32(op2imm)), target);
1771 emitGetVirtualRegisters(op1, regT0, op2, regT1);
1772 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1775 addJump(branch32(GreaterThan, regT0, regT1), target);
1795 Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
1796 addPtr(tagTypeNumberRegister, regT0);
1797 movePtrToDouble(regT0, fpRegT0);
1801 fail1 = emitJumpIfNotJSCell(regT0);
1803 Jump fail2 = checkStructure(regT0, m_globalData->numberStructure.get());
1804 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1826 stubCall.addArgument(regT0);
1829 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
1850 move(Imm32(op1imm), regT0);
1851 convertInt32ToDouble(regT0, fpRegT0);
1870 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
1877 Jump fail1 = emitJumpIfNotImmediateNumber(regT0);
1880 addPtr(tagTypeNumberRegister, regT0);
1882 movePtrToDouble(regT0, fpRegT0);
1887 fail1 = emitJumpIfNotJSCell(regT0);
1893 Jump fail3 = checkStructure(regT0, m_globalData->numberStructure.get());
1895 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
1919 stubCall.addArgument(regT0);
1922 emitJumpSlowToHot(branchTest32(Zero, regT0), target);
1933 emitGetVirtualRegister(op2, regT0);
1934 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1937 andPtr(Imm32(imm), regT0);
1939 emitFastArithIntToImmNoCheck(regT0, regT0);
1941 andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op1)))), regT0);
1944 emitGetVirtualRegister(op1, regT0);
1945 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1948 andPtr(Imm32(imm), regT0);
1950 emitFastArithIntToImmNoCheck(regT0, regT0);
1952 andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op2)))), regT0);
1955 emitGetVirtualRegisters(op1, regT0, op2, regT1);
1956 andPtr(regT1, regT0);
1957 emitJumpSlowCaseIfNotImmediateInteger(regT0);
1972 stubCall.addArgument(regT0);
1976 stubCall.addArgument(regT0);
1992 emitGetVirtualRegister(srcDst, regT0);
1993 move(regT0, regT1);
1994 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2014 stubCall.addArgument(regT0);
2024 emitGetVirtualRegister(srcDst, regT0);
2025 move(regT0, regT1);
2026 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2046 stubCall.addArgument(regT0);
2055 emitGetVirtualRegister(srcDst, regT0);
2056 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2058 addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
2059 emitFastArithIntToImmNoCheck(regT0, regT0);
2061 addSlowCase(branchAdd32(Overflow, Imm32(1 << JSImmediate::IntegerPayloadShift), regT0));
2062 signExtend32ToPtr(regT0, regT0);
2073 emitGetVirtualRegister(srcDst, regT0);
2076 stubCall.addArgument(regT0);
2084 emitGetVirtualRegister(srcDst, regT0);
2085 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2087 addSlowCase(branchSub32(Zero, Imm32(1), regT0));
2088 emitFastArithIntToImmNoCheck(regT0, regT0);
2090 addSlowCase(branchSub32(Zero, Imm32(1 << JSImmediate::IntegerPayloadShift), regT0));
2091 signExtend32ToPtr(regT0, regT0);
2102 emitGetVirtualRegister(srcDst, regT0);
2105 stubCall.addArgument(regT0);
2169 emitGetVirtualRegisters(op1, regT0, op2, regT2);
2170 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2177 emitPutVirtualRegister(result, regT0);
2214 emitGetVirtualRegisters(op1, regT0, op2, regT1);
2215 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2218 addSlowCase(branchAdd32(Overflow, regT1, regT0));
2220 addSlowCase(branchSub32(Overflow, regT1, regT0));
2223 addSlowCase(branchMul32(Overflow, regT1, regT0));
2224 addSlowCase(branchTest32(Zero, regT0));
2226 emitFastArithIntToImmNoCheck(regT0, regT0);
2248 emitGetVirtualRegister(op1, regT0);
2253 emitGetVirtualRegister(op1, regT0);
2256 stubCall.addArgument(regT0);
2264 emitJumpIfNotImmediateNumber(regT0).linkTo(stubFunctionCall, this);
2267 addPtr(tagTypeNumberRegister, regT0);
2268 movePtrToDouble(regT0, fpRegT2);
2272 emitJumpIfNotImmediateNumber(regT0).linkTo(stubFunctionCall, this);
2275 addPtr(tagTypeNumberRegister, regT0);
2276 movePtrToDouble(regT0, fpRegT2);
2281 emitJumpIfNotImmediateNumber(regT0).linkTo(stubFunctionCall, this);
2284 addPtr(tagTypeNumberRegister, regT0);
2285 movePtrToDouble(regT0, fpRegT1);
2294 convertInt32ToDouble(regT0, fpRegT1);
2311 moveDoubleToPtr(fpRegT1, regT0);
2312 subPtr(tagTypeNumberRegister, regT0);
2313 emitPutVirtualRegister(result, regT0);
2334 emitGetVirtualRegister(op2, regT0);
2335 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2336 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1)), regT0));
2337 emitFastArithIntToImmNoCheck(regT0, regT0);
2339 emitGetVirtualRegister(op1, regT0);
2340 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2341 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op2)), regT0));
2342 emitFastArithIntToImmNoCheck(regT0, regT0);
2374 emitGetVirtualRegister(op2, regT0);
2375 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2376 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2377 emitFastArithReTagImmediate(regT0, regT0);
2379 emitGetVirtualRegister(op1, regT0);
2380 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2381 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2382 emitFastArithReTagImmediate(regT0, regT0);
2409 emitGetVirtualRegister(op1, regT0);
2410 addPtr(tagTypeNumberRegister, regT0);
2411 movePtrToDouble(regT0, fpRegT0);
2415 emitGetVirtualRegister(op1, regT0);
2417 emitJumpSlowCaseIfNotImmediateNumber(regT0);
2418 Jump notInt = emitJumpIfNotImmediateInteger(regT0);
2419 convertInt32ToDouble(regT0, fpRegT0);
2422 addPtr(tagTypeNumberRegister, regT0);
2423 movePtrToDouble(regT0, fpRegT0);
2448 moveDoubleToPtr(fpRegT0, regT0);
2449 subPtr(tagTypeNumberRegister, regT0);
2451 emitPutVirtualRegister(dst, regT0);
2512 emitGetVirtualRegisters(src1, regT0, src2, regT1);
2526 Jump op1imm = emitJumpIfImmediateInteger(regT0);
2528 emitJumpSlowCaseIfNotJSCell(regT0, src1);
2529 addSlowCase(checkStructure(regT0, numberStructure));
2533 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
2537 emitFastArithImmToInt(regT0);
2538 convertInt32ToDouble(regT0, fpRegT0);
2552 move(regT1, regT0);
2559 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2564 Jump op1imm = emitJumpIfImmediateInteger(regT0);
2566 emitJumpSlowCaseIfNotJSCell(regT0, src1);
2567 addSlowCase(checkStructure(regT0, numberStructure));
2587 loadDouble(Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)), fpRegT0);
2596 storeDouble(fpRegT0, Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)));
2600 storeDouble(fpRegT0, Address(regT0, OBJECT_OFFSETOF(JSNumberCell, m_value)));
2609 emitJumpSlowCaseIfNotImmediateIntegers(regT0, regT1, regT2);
2612 emitFastArithDeTagImmediate(regT0);
2613 addSlowCase(branchAdd32(Overflow, regT1, regT0));
2615 addSlowCase(branchSub32(Overflow, regT1, regT0));
2616 signExtend32ToPtr(regT0, regT0);
2617 emitFastArithReTagImmediate(regT0, regT0);
2622 Jump op1Zero = emitFastArithDeTagImmediateJumpIfZero(regT0);
2627 move(regT0, regT2);
2631 addSlowCase(branchMul32(Overflow, regT1, regT0));
2632 signExtend32ToPtr(regT0, regT0);
2633 emitFastArithReTagImmediate(regT0, regT0);
2693 emitGetVirtualRegister(op2, regT0);
2694 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2695 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), regT0));
2696 signExtend32ToPtr(regT0, regT0);
2699 emitGetVirtualRegister(op1, regT0);
2700 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2701 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), regT0));
2702 signExtend32ToPtr(regT0, regT0);
2722 sub32(Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), regT0);
2726 stubCall.addArgument(regT0);
2731 sub32(Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), regT0);
2734 stubCall.addArgument(regT0);
2753 emitGetVirtualRegister(op2, regT0);
2754 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2755 emitFastArithDeTagImmediate(regT0);
2756 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2757 signExtend32ToPtr(regT0, regT0);
2758 emitFastArithReTagImmediate(regT0, regT0);
2761 emitGetVirtualRegister(op1, regT0);
2762 emitJumpSlowCaseIfNotImmediateInteger(regT0);
2763 emitFastArithDeTagImmediate(regT0);
2764 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2765 signExtend32ToPtr(regT0, regT0);
2766 emitFastArithReTagImmediate(regT0, regT0);
