Lines Matching refs:pDmaParams
183 DmaParams_T *pDmaParams = whal_ParamsGetDmaParams(pWhalParams);
187 pDmaParams->rxMemBlkNumber = 35; /*pInitParams->rxMemBlkNumber;*/
188 pDmaParams->txMinMemBlkNumber = 64; /*pInitParams->txMinMemBlkNumber;*/
189 pDmaParams->BlockSize = HAL_CTRL_ACX_BLOCK_SIZE_DEF; /*pInitParams->blockSize;*/
190 pDmaParams->NumRxQueues = 1;
191 pDmaParams->NumTxQueues = MAX_NUM_OF_TX_QUEUES; /*pInitParams->numTxQueues;*/
192 pDmaParams->RxNumDesc = HAL_CTRL_ACX_RX_DESC_DEF; /*pInitParams->rxDescNum;*/
194 pDmaParams->TraceBufferSize = (TRACE_BUFFER_MAX_SIZE * 4); /*pInitParams->TraceBufferSize;*/
195 pDmaParams->TraceBufferDoPrint = FALSE; /*pInitParams->bDoPrint;*/
197 if ((pDmaParams->NumTxQueues > MAX_NUM_OF_TX_QUEUES) || (pDmaParams->NumTxQueues < 1) )
200 ("\nwhal_ParamsSetDmaParams: numTxQueues is invalid, setting it to 1. numTxQueues=%d\n",pDmaParams->NumTxQueues ));
201 pDmaParams->NumTxQueues = 1;
204 for (i=0;i<pDmaParams->NumTxQueues;i++)
206 pDmaParams->TxNumDesc[i] = HAL_CTRL_ACX_TX_DESC_DEF; /*pInitParams->tx_attrib_queue[i].numDesc;*/
207 pDmaParams->TxQPriority[i] = i; /*pInitParams->tx_attrib_queue[i].priority; */
211 pDmaParams->RxQPriority = DEFAULT_RX_Q_PRIORITY;
212 pDmaParams->NumStations = DEFAULT_NUM_STATIONS;
213 pDmaParams->RxQueue_Priority = DEFAULT_RXQ_PRIORITY;
214 pDmaParams->RxQueue_Type = DEFAULT_RXQ_TYPE;
218 pDmaParams->NumTxQueues = 2;
219 pDmaParams->TxNumDesc[1] = DEFAULT_NUM_BCAST_TX_DESC;
220 pDmaParams->TxQPriority[1] = DEFAULT_BCAST_PRIORITY;
