1 /* 2 * public_infoele.h 3 * 4 * Copyright(c) 1998 - 2009 Texas Instruments. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name Texas Instruments nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /********************************************************************************************************************** 35 36 FILENAME: public_infoele.h 37 38 DESCRIPTION: Contains information element defines/structures used by the FW and host. 39 40 41 42 ***********************************************************************************************************************/ 43 #ifndef PUBLIC_INFOELE_H 44 #define PUBLIC_INFOELE_H 45 46 47 #include "public_types.h" 48 #include "public_commands.h" 49 #include "public_radio.h" 50 51 typedef enum 52 { 53 ACX_WAKE_UP_CONDITIONS = 0x0002, 54 ACX_MEM_CFG = 0x0003, 55 ACX_SLOT = 0x0004, 56 57 ACX_AC_CFG = 0x0007, 58 ACX_MEM_MAP = 0x0008, 59 ACX_AID = 0x000A, 60 61 ACX_MEDIUM_USAGE = 0x000F, 62 ACX_RX_CFG = 0x0010, 63 ACX_TX_QUEUE_CFG = 0x0011, 64 ACX_STATISTICS = 0x0013, /* Debug API*/ 65 ACX_PWR_CONSUMPTION_STATISTICS =0x0014, 66 ACX_FEATURE_CFG = 0x0015, 67 ACX_TID_CFG = 0x001A, 68 ACX_PS_RX_STREAMING = 0x001B, 69 ACX_BEACON_FILTER_OPT = 0x001F, 70 ACX_NOISE_HIST = 0x0021, 71 ACX_HDK_VERSION = 0x0022, /* ???*/ 72 ACX_PD_THRESHOLD = 0x0023, 73 ACX_TX_CONFIG_OPT = 0x0024, 74 ACX_CCA_THRESHOLD = 0x0025, 75 ACX_EVENT_MBOX_MASK = 0x0026, 76 ACX_CONN_MONIT_PARAMS = 0x002D, 77 ACX_CONS_TX_FAILURE = 0x002F, 78 ACX_BCN_DTIM_OPTIONS = 0x0031, 79 ACX_SG_ENABLE = 0x0032, 80 ACX_SG_CFG = 0x0033, 81 ACX_FM_COEX_CFG = 0x0034, 82 83 ACX_BEACON_FILTER_TABLE = 0x0038, 84 ACX_ARP_IP_FILTER = 0x0039, 85 ACX_ROAMING_STATISTICS_TBL = 0x003B, 86 ACX_RATE_POLICY = 0x003D, 87 ACX_CTS_PROTECTION = 0x003E, 88 ACX_SLEEP_AUTH = 0x003F, 89 ACX_PREAMBLE_TYPE = 0x0040, 90 ACX_ERROR_CNT = 0x0041, 91 ACX_IBSS_FILTER = 0x0044, 92 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045, 93 ACX_TSF_INFO = 0x0046, 94 ACX_CONFIG_PS_WMM = 0x0049, 95 ACX_ENABLE_RX_DATA_FILTER = 0x004A, 96 ACX_SET_RX_DATA_FILTER = 0x004B, 97 ACX_GET_DATA_FILTER_STATISTICS = 0x004C, 98 ACX_RX_CONFIG_OPT = 0x004E, 99 ACX_FRAG_CFG = 0x004F, 100 ACX_BET_ENABLE = 0x0050, 101 102 #ifdef RADIO_SCOPE /* RADIO MODULE SECTION START */ 103 104 ACX_RADIO_MODULE_START = 0x0500, 105 ACX_RS_ENABLE = ACX_RADIO_MODULE_START, 106 ACX_RS_RX = 0x0501, 107 108 /* Add here ... */ 109 110 ACX_RADIO_MODULE_END = 0x0600, 111 112 #endif /* RADIO MODULE SECTION END */ 113 114 ACX_RSSI_SNR_TRIGGER = 0x0051, 115 ACX_RSSI_SNR_WEIGHTS = 0x0052, 116 ACX_KEEP_ALIVE_MODE = 0x0053, 117 ACX_SET_KEEP_ALIVE_CONFIG = 0x0054, 118 ACX_BA_SESSION_RESPONDER_POLICY = 0x0055, 119 ACX_BA_SESSION_INITIATOR_POLICY = 0x0056, 120 ACX_PEER_HT_CAP = 0x0057, 121 ACX_HT_BSS_OPERATION = 0x0058, 122 ACX_COEX_ACTIVITY = 0x0059, 123 ACX_SET_SMART_REFLEX_DEBUG = 0x005A, 124 ACX_SET_SMART_REFLEX_STATE = 0x005B, 125 ACX_SET_SMART_REFLEX_PARAMS = 0x005F, 126 ACX_BURST_MODE = 0x005C, 127 128 ACX_SET_RATE_MAMAGEMENT_PARAMS = 0x005D, 129 ACX_GET_RATE_MAMAGEMENT_PARAMS = 0x005E, 130 131 DOT11_RX_MSDU_LIFE_TIME = 0x1004, 132 DOT11_CUR_TX_PWR = 0x100D, 133 DOT11_RX_DOT11_MODE = 0x1012, 134 DOT11_RTS_THRESHOLD = 0x1013, 135 DOT11_GROUP_ADDRESS_TBL = 0x1014, 136 ACX_SET_RADIO_PARAMS = 0x1015, 137 ACX_PM_CONFIG = 0x1016, 138 139 MAX_DOT11_IE = ACX_PM_CONFIG, 140 141 MAX_IE = 0xFFFF /*force enumeration to 16bits*/ 142 } InfoElement_enum; 143 144 145 #ifdef HOST_COMPILE 146 typedef uint16 InfoElement_e; 147 #else 148 typedef InfoElement_enum InfoElement_e; 149 #endif 150 151 152 typedef struct 153 { 154 InfoElement_e id; 155 uint16 length; 156 uint32 dataLoc; /*use this to point to for following variable-length data*/ 157 } InfoElement_t; 158 159 160 typedef struct 161 { 162 uint16 id; 163 uint16 len; 164 } EleHdrStruct; 165 166 #define MAX_NUM_AID 4 /* max number of STAs in IBSS */ 167 168 169 #ifdef HOST_COMPILE 170 #define INFO_ELE_HDR EleHdrStruct EleHdr; 171 #else 172 #define INFO_ELE_HDR 173 #endif 174 175 /****************************************************************************** 176 177 Name: ACX_WAKE_UP_CONDITIONS 178 Type: Configuration 179 Access: Write Only 180 Length: 2 181 182 ******************************************************************************/ 183 typedef enum 184 { 185 WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/ 186 WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/ 187 WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM (Listen interval)*/ 188 WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon (Nx Beacon)*/ 189 WAKE_UP_EVENT_BITS_MASK = 0x0F 190 } WakeUpEventBitMask_e; 191 192 typedef struct 193 { 194 INFO_ELE_HDR 195 uint8 wakeUpConditionBitmap; /* The host can set one bit only. */ 196 /* WakeUpEventBitMask_e describes the Possible */ 197 /* Wakeup configuration bits*/ 198 199 uint8 listenInterval; /* 0 for Beacon and Dtim, */ 200 /* xDtims (1-10) for Listen Interval and */ 201 /* xBeacons (1-255) for NxBeacon*/ 202 uint8 padding[2]; /* alignment to 32bits boundry */ 203 }WakeUpCondition_t; 204 205 /****************************************************************************** 206 207 Name: ACX_MEM_CFG 208 Type: Configuration 209 Access: Write Only 210 Length: 12 211 212 ******************************************************************************/ 213 214 typedef struct 215 { 216 INFO_ELE_HDR 217 uint8 rxMemblockNumber; /* specifies the number of memory buffers that */ 218 /* is allocated to the Rx memory pool. The */ 219 /* actual number allocated may be less than*/ 220 /* this number if there are not enough memory */ 221 /* blocks left over for the Minimum Number of */ 222 /* Tx Blocks. Returns the actual number of RX */ 223 /* buffers allocated in the memory map*/ 224 225 uint8 txMinimumMemblockNumber; /* specifies the minimum number of blocks that */ 226 /* must be allocated to the TX pool. Follows */ 227 /* this limit even if the Number of Rx Memory */ 228 /* Blocks parameter is ignored.*/ 229 230 uint8 numStations; /* The number of STAs supported in IBSS mode. */ 231 /* The FW uses this field to allocate memory */ 232 /* for STA context data such as security keys*/ 233 234 uint8 numSsidProfiles; /* The number of SSID profiles used in IBSS mode */ 235 /* Enables different profiles for different STAs */ 236 237 uint32 totalTxDescriptors; /* Total TX Descriptors - in the past it was configured per AC */ 238 } ACXConfigMemory_t; 239 240 241 /****************************************************************************** 242 243 Name: ACX_SLOT 244 Type: Configuration 245 Access: Write Only 246 Length: 8 247 248 ******************************************************************************/ 249 250 typedef enum 251 { 252 SLOT_TIME_LONG = 0, /* the WiLink uses long (20 us) slots*/ 253 SLOT_TIME_SHORT = 1, /* the WiLink uses short (9 us) slots*/ 254 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT, 255 MAX_SLOT_TIMES = 0xFF 256 } SlotTime_enum; 257 258 #ifdef HOST_COMPILE 259 typedef uint8 SlotTime_e; 260 #else 261 typedef SlotTime_enum SlotTime_e; 262 #endif 263 264 265 typedef struct 266 { 267 INFO_ELE_HDR 268 uint8 woneIndex; /* reserved*/ 269 270 SlotTime_e slotTime; /* The slot size to be used. refer to SlotTime_enum. */ 271 uint8 reserved[6]; 272 } ACXSlot_t; 273 274 275 /****************************************************************************** 276 277 Name: ACX_AC_CFG 278 Type: Configuration 279 Access: Write Only 280 Length: 8 281 282 ******************************************************************************/ 283 typedef enum 284 { 285 AC_BE = 0, /* Best Effort/Legacy*/ 286 AC_BK = 1, /* Background*/ 287 AC_VI = 2, /* Video*/ 288 AC_VO = 3, /* Voice*/ 289 /* AC_BCAST = 4, */ /* Broadcast dummy access category */ 290 AC_CTS2SELF = 4, /* CTS2Self fictitious AC, */ 291 /* uses #4 to follow AC_VO, as */ 292 /* AC_BCAST does not seem to be in use. */ 293 AC_ANY_TID = 0x1F, 294 AC_INVALID = 0xFF, /* used for gTxACconstraint */ 295 NUM_ACCESS_CATEGORIES = 4 296 } AccessCategory_enum; 297 298 typedef enum 299 { 300 TID0 = 0, /* Best Effort/Legacy*/ 301 TID1 = 1, /* Best Effort/Legacy*/ 302 TID2 = 2, /* Background*/ 303 TID3 = 3, /* Video*/ 304 TID4 = 4, /* Voice*/ 305 TID5 = 5, /* Broadcast dummy access category*/ 306 TID6 = 6, 307 TID7 = 7, /* managment */ 308 NUM_TRAFFIC_CATEGORIES = 8 309 } TrafficCategory_enum; 310 311 312 #define AC_REQUEST 0xfe /* Special access category type for */ 313 /* requests*/ 314 315 316 /* following are defult values for the IE fields*/ 317 #define CWMIN_BK 15 318 #define CWMIN_BE 15 319 #define CWMIN_VI 7 320 #define CWMIN_VO 3 321 #define CWMAX_BK 1023 322 #define CWMAX_BE 63 323 #define CWMAX_VI 15 324 #define CWMAX_VO 7 325 #define AIFS_PIFS 1 /* slot number setting to start transmission at PIFS interval */ 326 #define AIFS_DIFS 2 /* slot number setting to start transmission at DIFS interval - */ 327 /* normal DCF access */ 328 329 #define AIFS_MIN AIFS_PIFS 330 331 #define AIFSN_BK 7 332 #define AIFSN_BE 3 333 #define AIFSN_VI AIFS_PIFS 334 #define AIFSN_VO AIFS_PIFS 335 #define TXOP_BK 0 336 #define TXOP_BE 0 337 #define TXOP_VI 3008 338 #define TXOP_VO 1504 339 #define DEFAULT_AC_SHORT_RETRY_LIMIT 7 340 #define DEFAULT_AC_LONG_RETRY_LIMIT 4 341 342 /* rxTimeout values */ 343 #define NO_RX_TIMEOUT 0 344 345 typedef struct 346 { 347 INFO_ELE_HDR 348 uint8 ac; /* Access Category - The TX queue's access category */ 349 /* (refer to AccessCategory_enum)*/ 350 uint8 cwMin; /* The contention window minimum size (in slots) for */ 351 /* the access class.*/ 352 uint16 cwMax; /* The contention window maximum size (in slots) for */ 353 /* the access class.*/ 354 uint8 aifsn; /* The AIF value (in slots) for the access class.*/ 355 uint8 reserved; 356 uint16 txopLimit; /* The TX Op Limit (in microseconds) for the access class.*/ 357 } ACXAcCfg_t; 358 359 360 /****************************************************************************** 361 362 Name: ACX_MEM_MAP 363 Type: Configuration 364 Access: Read Only 365 Length: 72 366 Note: Except for the numTxMemBlks, numRxMemBlks fields, this is 367 used in MASTER mode only!!! 368 369 ******************************************************************************/ 370 #define MEM_MAP_NUM_FIELDS 24 371 372 typedef struct 373 { 374 uint32 *controlBlock; /* array of two 32-bit entries in the following order: 375 1. Tx-Result entries counter written by the FW 376 2. Tx-Result entries counter read by the host */ 377 void *txResultQueueStart; /* points t first descriptor in TRQ */ 378 } TxResultPointers_t; 379 380 381 typedef struct 382 { 383 INFO_ELE_HDR 384 void *codeStart; 385 void *codeEnd; 386 void *wepDefaultKeyStart; 387 void *wepDefaultKeyEnd; 388 void *staTableStart; 389 void *staTableEnd; 390 void *packetTemplateStart; 391 void *packetTemplateEnd; 392 TxResultPointers_t trqBlock; 393 394 void *queueMemoryStart; 395 void *queueMemoryEnd; 396 void *packetMemoryPoolStart; 397 void *packetMemoryPoolEnd; 398 void *debugBuffer1Start; 399 void *debugBuffer1End; 400 void *debugBuffer2Start; 401 void *debugBuffer2End; 402 403 uint32 numTxMemBlks; /* Number of blocks that FW allocated for TX packets.*/ 404 uint32 numRxMemBlks; /* Number of blocks that FW allocated for RX packets. */ 405 406 /* the following 4 fields are valid in SLAVE mode only */ 407 uint8 *txCBufPtr; 408 uint8 *rxCBufPtr; 409 void *rxControlPtr; 410 void *txControlPtr; 411 412 } MemoryMap_t; 413 414 415 /****************************************************************************** 416 417 Name: ACX_AID 418 Type: Configuration 419 Access: Write Only 420 Length: 2 421 422 ******************************************************************************/ 423 424 typedef struct 425 { 426 INFO_ELE_HDR 427 uint16 Aid; /* The Association ID to the WiLink. The WiLink uses this */ 428 /* field to determine when the STA's AID bit is set in a */ 429 /* received beacon and when a PS Poll frame should be */ 430 /* transmitted to the AP. The host configures this information */ 431 /* element after it has associated with an AP. This information */ 432 /* element does not need to be set in Ad Hoc mode.*/ 433 uint8 padding[2]; /* alignment to 32bits boundry */ 434 } ACXAid_t; 435 436 437 /****************************************************************************** 438 439 Name: ACX_ERROR_CNT 440 Type: Operation 441 Access: Read Only 442 Length: 12 443 444 ******************************************************************************/ 445 typedef struct 446 { 447 INFO_ELE_HDR 448 uint32 PLCPErrorCount; /* The number of PLCP errors since the last time this */ 449 /* information element was interrogated. This field is */ 450 /* automatically cleared when it is interrogated.*/ 451 452 uint32 FCSErrorCount; /* The number of FCS errors since the last time this */ 453 /* information element was interrogated. This field is */ 454 /* automatically cleared when it is interrogated.*/ 455 456 uint32 validFrameCount; /* The number of MPDUs without PLCP header errors received*/ 457 /* since the last time this information element was interrogated. */ 458 /* This field is automatically cleared when it is interrogated.*/ 459 460 uint32 seqNumMissCount; /* the number of missed sequence numbers in the squentially */ 461 /* values of frames seq numbers */ 462 463 } ACXErrorCounters_t; 464 465 /****************************************************************************** 466 467 Name: ACX_MEDIUM_USAGE 468 Type: Configuration 469 Access: Read Only 470 Length: 8 471 472 ******************************************************************************/ 473 474 typedef struct 475 { 476 INFO_ELE_HDR 477 uint32 mediumUsage; /* report to the host the value of medium usage registers*/ 478 uint32 period; /* report to the host the value of medium period registers*/ 479 } ACXMediumUsage_t; 480 481 /****************************************************************************** 482 483 Name: ACX_RX_CFG 484 Type: Filtering Configuration 485 Access: Write Only 486 Length: 8 487 488 ******************************************************************************/ 489 /* 490 * Rx configuration (filter) information element 491 * --------------------------------------------- 492 */ 493 /* 494 RX ConfigOptions Table 495 Bit Definition 496 === ========== 497 31:14 Reserved 498 13 Copy RX Status - when set, write three receive status words to top of 499 rx'd MPDU. 500 When clear, do not write three status words (added rev 1.5) 501 12 Reserved 502 11 RX Complete upon FCS error - when set, give rx complete interrupt for 503 FCS errors, after the rx filtering, e.g. unicast frames not to us with 504 FCS error will not generate an interrupt 505 10 SSID Filter Enable - When set, the WiLink discards all beacon, 506 probe request, and probe response frames with an SSID that does not 507 match the SSID specified by the host in the START/JOIN command. 508 When clear, the WiLink receives frames with any SSID. 509 9 Broadcast Filter Enable - When set, the WiLink discards all broadcast 510 frames. When clear, the WiLink receives all received broadcast frames. 511 8:6 Reserved 512 5 BSSID Filter Enable - When set, the WiLink discards any frames with a 513 BSSID that does not match the BSSID specified by the host. 514 When clear, the WiLink receives frames from any BSSID. 515 4 MAC Addr Filter - When set, the WiLink discards any frames with a 516 destination address that does not match the MAC address of the adaptor. 517 When clear, the WiLink receives frames destined to any MAC address. 518 3 Promiscuous - When set, the WiLink receives all valid frames 519 (i.e., all frames that pass the FCS check). 520 When clear, only frames that pass the other filters specified are received. 521 2 FCS - When set, the WiLink includes the FCS with the received frame. 522 When clear, the FCS is discarded. 523 1 PLCP header - When set, write all data from baseband to frame buffer 524 including PHY header. 525 0 Reserved - Always equal to 0. 526 527 RX FilterOptions Table 528 Bit Definition 529 === ========== 530 31:12 Reserved - Always equal to 0. 531 11 Association - When set, the WiLink receives all association related frames 532 (association request/response, reassocation request/response, and 533 disassociation). When clear, these frames are discarded. 534 10 Auth/De auth - When set, the WiLink receives all authentication and 535 de-authentication frames. When clear, these frames are discarded. 536 9 Beacon - When set, the WiLink receives all beacon frames. When clear, 537 these frames are discarded. 538 8 Contention Free - When set, the WiLink receives all contention free frames. 539 When clear, these frames are discarded. 540 7 Control - When set, the WiLink receives all control frames. 541 When clear, these frames are discarded. 542 6 Data - When set, the WiLink receives all data frames. 543 When clear, these frames are discarded. 544 5 FCS Error - When set, the WiLink receives frames that have FCS errors. 545 When clear, these frames are discarded. 546 4 Management - When set, the WiLink receives all management frames. 547 When clear, these frames are discarded. 548 3 Probe Request - When set, the WiLink receives all probe request frames. 549 When clear, these frames are discarded. 550 2 Probe Response - When set, the WiLink receives all probe response frames. 551 When clear, these frames are discarded. 552 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK frames. 553 When clear, these frames are discarded. 554 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames that 555 have reserved frame types and sub types as defined by the 802.11 556 specification. 557 When clear, these frames are discarded. 558 */ 559 typedef struct 560 { 561 INFO_ELE_HDR 562 uint32 ConfigOptions; /* The configuration of the receiver in the WiLink. */ 563 /* "RX ConfigOptions Table" describes the format of */ 564 /* this field.*/ 565 uint32 FilterOptions; /* The types of frames that the WiLink can receive. */ 566 /* "RX FilterOptions Table" describes the format of */ 567 /* this field.*/ 568 } ACXRxConfig_t; 569 570 /****************************************************************************** 571 572 Name: ACX_BEACON_FILTER_OPT 573 Desc: This information element enables the host to activate beacon filtering. 574 The filter can only be activated when the STA is in PS mode. 575 When activated, either the host is not notified about beacons whose 576 unicast TIM bit is not set, or these beacons are buffered first and 577 the host is notified only after the buffer reaches a predetermined size. 578 The host should not activate the filter if it configures the firmware 579 to listen to broadcasts (see the VBM Options field in the 580 ACXPowerMgmtOptions information element). The filter only affects beacons, 581 and not other MSDUs - the firmware notifies the host immediately about 582 their arrival. 583 Type: Filtering Configuration 584 Access: Write Only 585 Length: 2 586 587 ******************************************************************************/ 588 typedef struct 589 { 590 INFO_ELE_HDR 591 uint8 enable; /* Indicates whether the filter is enabled. */ 592 /* 1 - enabled, 0 - disabled. */ 593 uint8 maxNumOfBeaconsStored; /* The number of beacons without the unicast TIM */ 594 /* bit set that the firmware buffers before */ 595 /* signaling the host about ready frames. */ 596 /* When set to 0 and the filter is enabled, beacons */ 597 /* without the unicast TIM bit set are dropped.*/ 598 uint8 padding[2]; /* alignment to 32bits boundry */ 599 } ACXBeaconFilterOptions_t; 600 601 602 /****************************************************************************** 603 604 Name: ACX_BEACON_FILTER_TABLE 605 Desc: This information element configures beacon filtering handling for the 606 set of information elements. An information element in a beacon can be 607 set to be: ignored (never compared, and changes will not cause beacon 608 transfer), checked (compared, and transferred in case of a change), or 609 transferred (transferred to the host for each appearance or disappearance). 610 The table contains all information elements that are subject to monitoring 611 for host transfer. 612 All information elements that are not in the table should be ignored for 613 monitoring. 614 This functionality is only enabled when beacon filtering is enabled by 615 ACX_BEACON_FILTER_OPT. 616 Type: Filtering Configuration 617 Access: Write Only 618 Length: 101 619 Notes: the field measuring the value of received beacons for which the device 620 wakes up the host in ACX_BEACON_FILTER_OPT does not affect 621 this information element. 622 623 ******************************************************************************/ 624 625 /* 626 ACXBeaconFilterEntry (not 221) 627 Byte Offset Size (Bytes) Definition 628 =========== ============ ========== 629 0 1 IE identifier 630 1 1 Treatment bit mask 631 632 ACXBeaconFilterEntry (221) 633 Byte Offset Size (Bytes) Definition 634 =========== ============ ========== 635 0 1 IE identifier 636 1 1 Treatment bit mask 637 2 3 OUI 638 5 1 Type 639 6 2 Version 640 641 642 Treatment bit mask - The information element handling: 643 bit 0 - The information element is compared and transferred 644 in case of change. 645 bit 1 - The information element is transferred to the host 646 with each appearance or disappearance. 647 Note that both bits can be set at the same time. 648 */ 649 #define BEACON_FILTER_TABLE_MAX_IE_NUM (32) 650 #define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6) 651 #define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2) 652 #define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6) 653 #define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \ 654 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE)) 655 656 typedef struct ACXBeaconFilterIETableStruct { 657 INFO_ELE_HDR 658 uint8 NumberOfIEs; /* The number of IE's in the table*/ 659 /* 0 - clears the table.*/ 660 661 uint8 padding[3]; /* alignment to 32bits boundry */ 662 uint8 IETable[BEACON_FILTER_TABLE_MAX_SIZE]; 663 } ACXBeaconFilterIETable_t; 664 665 /****************************************************************************** 666 667 Name: ACX_COEX_ACTIVITY_TABLE 668 669 ******************************************************************************/ 670 671 typedef enum 672 { 673 COEX_IP_BT = 0, 674 COEX_IP_WLAN, 675 COEX_IP_DUAL_MODE, /* That define isn't valid value in DR&FW interface and use just in the FW */ 676 MAX_COEX_IP 677 } CoexIp_enum; 678 679 #ifdef HOST_COMPILE 680 typedef uint8 CoexIp_e; 681 #else 682 typedef CoexIp_enum CoexIp_e; 683 #endif 684 685 typedef struct ACXCoexActivityIEStruct { 686 INFO_ELE_HDR 687 CoexIp_e coexIp; /* 0-BT, 1-WLAN (according to CoexIp_e in FW) */ 688 uint8 activityId; /* According to BT/WLAN activity numbering in FW */ 689 uint8 defaultPriority; /* 0-255, activity default priority */ 690 uint8 raisedPriority; /* 0-255, activity raised priority */ 691 uint16 minService; /* 0-65535, The minimum service requested either in 692 requests or in milliseconds depending on activity ID */ 693 uint16 maxService; /* 0-65535, The maximum service allowed either in 694 requests or in milliseconds depending on activity ID */ 695 } ACXCoexActivityIE_t; 696 697 /****************************************************************************** 698 699 Name: ACX_ARP_IP_FILTER 700 Type: Filtering Configuration 701 Access: Write Only 702 Length: 20 703 704 ******************************************************************************/ 705 706 typedef struct 707 { 708 INFO_ELE_HDR 709 uint8 ipVersion; /* The IP version of the IP address: 4 - IPv4, 6 - IPv6.*/ 710 uint8 arpFilterEnable; /* 1 - ARP filtering is enabled. */ 711 /* 0 - ARP filtering is disabled.*/ 712 uint8 padding[2]; /* alignment to 32bits boundry */ 713 uint8 address[16]; /* The IP address used to filter ARP packets. ARP packets */ 714 /* that do not match this address are dropped. */ 715 /* When the IP Version is 4, the last 12 bytes of */ 716 /* the address are ignored.*/ 717 718 } ACXConfigureIP_t; 719 720 721 /****************************************************************************** 722 723 Name: ACX_IBSS_FILTER 724 Type: Filtering Configuration 725 Access: Write Only 726 Length: 1 727 728 ******************************************************************************/ 729 typedef struct 730 { 731 INFO_ELE_HDR 732 uint8 enable; /* if set (i.e. IBSS mode), forward beacons from the same SSID*/ 733 /* (also from different BSSID), with bigger TSF then the this of */ 734 /* the current BSS.*/ 735 uint8 padding[3]; /* alignment to 32bits boundry */ 736 } ACXIBSSFilterOptions_t; 737 738 739 /****************************************************************************** 740 741 Name: ACX_SERVICE_PERIOD_TIMEOUT 742 Type: Configuration 743 Access: Write Only 744 Length: 1 745 746 ******************************************************************************/ 747 typedef struct 748 { 749 INFO_ELE_HDR 750 uint16 PsPollTimeout; /* the maximum time that the device will wait to receive */ 751 /* traffic from the AP after transmission of PS-poll.*/ 752 753 uint16 UpsdTimeout; /* the maximum time that the device will wait to receive */ 754 /* traffic from the AP after transmission from UPSD enabled*/ 755 /* queue.*/ 756 } ACXRxTimeout_t; 757 758 /****************************************************************************** 759 760 Name: ACX_TX_QUEUE_CFG 761 Type: Configuration 762 Access: Write Only 763 Length: 8 764 765 ******************************************************************************/ 766 typedef struct 767 { 768 INFO_ELE_HDR 769 uint8 qID; /* The TX queue ID number.*/ 770 uint8 padding[3]; /* alignment to 32bits boundry */ 771 uint16 numberOfBlockHighThreshold; /* The maximum memory blocks allowed in the */ 772 /* queue.*/ 773 uint16 numberOfBlockLowThreshold; /* The minimum memory blocks that are */ 774 /* guaranteed for this queue.*/ 775 } ACXTxQueueCfg_t; 776 777 778 /****************************************************************************** 779 780 Name: ACX_STATISTICS 781 Type: Statistics 782 Access: Write Only 783 Length: 784 Note: Debug API 785 786 ******************************************************************************/ 787 typedef struct 788 { 789 uint32 debug1; 790 uint32 debug2; 791 uint32 debug3; 792 uint32 debug4; 793 uint32 debug5; 794 uint32 debug6; 795 }DbgStatistics_t; 796 797 typedef struct 798 { 799 uint32 numOfTxProcs; 800 uint32 numOfPreparedDescs; 801 uint32 numOfTxXfr; 802 uint32 numOfTxDma; 803 uint32 numOfTxCmplt; 804 uint32 numOfRxProcs; 805 uint32 numOfRxData; 806 }RingStatistics_t; 807 808 typedef struct 809 { 810 uint32 numOfTxTemplatePrepared; 811 uint32 numOfTxDataPrepared; 812 uint32 numOfTxTemplateProgrammed; 813 uint32 numOfTxDataProgrammed; 814 uint32 numOfTxBurstProgrammed; 815 uint32 numOfTxStarts; 816 uint32 numOfTxImmResp; 817 uint32 numOfTxStartTempaltes; 818 uint32 numOfTxStartIntTemplate; 819 uint32 numOfTxStartFwGen; 820 uint32 numOfTxStartData; 821 uint32 numOfTxStartNullFrame; 822 uint32 numOfTxExch; 823 uint32 numOfTxRetryTemplate; 824 uint32 numOfTxRetryData; 825 uint32 numOfTxExchPending; 826 uint32 numOfTxExchExpiry; 827 uint32 numOfTxExchMismatch; 828 uint32 numOfTxDoneTemplate; 829 uint32 numOfTxDoneData; 830 uint32 numOfTxDoneIntTemplate; 831 uint32 numOfTxPreXfr; 832 uint32 numOfTxXfr; 833 uint32 numOfTxXfrOutOfMem; 834 uint32 numOfTxDmaProgrammed; 835 uint32 numOfTxDmaDone; 836 } TxStatistics_t; 837 838 839 typedef struct 840 { 841 uint32 RxOutOfMem; 842 uint32 RxHdrOverflow; 843 uint32 RxHWStuck; 844 uint32 RxDroppedFrame; 845 uint32 RxCompleteDroppedFrame; 846 uint32 RxAllocFrame; 847 uint32 RxDoneQueue; 848 uint32 RxDone; 849 uint32 RxDefrag; 850 uint32 RxDefragEnd; 851 uint32 RxMic; 852 uint32 RxMicEnd; 853 uint32 RxXfr; 854 uint32 RxXfrEnd; 855 uint32 RxCmplt; 856 uint32 RxPreCmplt; 857 uint32 RxCmpltTask; 858 uint32 RxPhyHdr; 859 uint32 RxTimeout; 860 } RxStatistics_t; 861 862 863 typedef struct 864 { 865 uint32 RxDMAErrors; 866 uint32 TxDMAErrors; 867 } DMAStatistics_t; 868 869 870 typedef struct 871 { 872 uint32 IRQs; /* irqisr() */ 873 } IsrStatistics_t; 874 875 876 typedef struct WepStatistics_t 877 { 878 uint32 WepAddrKeyCount; /* Count of WEP address keys configured*/ 879 uint32 WepDefaultKeyCount; /* Count of default keys configured*/ 880 uint32 WepKeyNotFound; /* count of number of times that WEP key not found on lookup*/ 881 uint32 WepDecryptFail; /* count of number of times that WEP key decryption failed*/ 882 uint32 WepEncryptFail; /* count of number of times that WEP key encryption failed*/ 883 uint32 WepDecPackets; /* WEP Packets Decrypted*/ 884 uint32 WepDecInterrupt; /* WEP Decrypt Interrupts*/ 885 uint32 WepEnPackets; /* WEP Packets Encrypted*/ 886 uint32 WepEnInterrupt; /* WEP Encrypt Interrupts*/ 887 } WepStatistics_t; 888 889 890 #define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10 891 typedef struct PwrStatistics_t 892 { 893 uint32 MissingBcnsCnt; /* Count the amount of missing beacon interrupts to the host.*/ 894 uint32 RcvdBeaconsCnt; /* Count the number of received beacons.*/ 895 uint32 ConnectionOutOfSync; /* Count the number of times TSF Out Of Sync occures, meaning we lost more consecutive beacons that defined by the host's threshold.*/ 896 uint32 ContMissBcnsSpread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD]; /* Gives statistics about the spread continuous missed beacons.*/ 897 /* The 16 LSB are dedicated for the PS mode.*/ 898 /* The 16 MSB are dedicated for the PS mode.*/ 899 /* ContMissBcnsSpread[0] - single missed beacon.*/ 900 /* ContMissBcnsSpread[1] - two continuous missed beacons.*/ 901 /* ContMissBcnsSpread[2] - three continuous missed beacons.*/ 902 /* ...*/ 903 /* ContMissBcnsSpread[9] - ten and more continuous missed beacons.*/ 904 uint32 RcvdAwakeBeaconsCnt; /* Count the number of beacons in awake mode.*/ 905 } PwrStatistics_t; 906 907 908 typedef struct MicStatistics_t 909 { 910 uint32 MicRxPkts; 911 uint32 MicCalcFailure; 912 } MicStatistics_t; 913 914 915 typedef struct AesStatisticsStruct 916 { 917 uint32 AesEncryptFail; 918 uint32 AesDecryptFail; 919 uint32 AesEncryptPackets; 920 uint32 AesDecryptPackets; 921 uint32 AesEncryptInterrupt; 922 uint32 AesDecryptInterrupt; 923 } AesStatistics_t; 924 925 typedef struct GemStatisticsStruct 926 { 927 uint32 GemEncryptFail; 928 uint32 GemDecryptFail; 929 uint32 GemEncryptPackets; 930 uint32 GemDecryptPackets; 931 uint32 GemEncryptInterrupt; 932 uint32 GemDecryptInterrupt; 933 } GemStatistics_t; 934 935 typedef struct EventStatistics_t 936 { 937 uint32 calibration; 938 uint32 rxMismatch; 939 uint32 rxMemEmpty; 940 } EventStatistics_t; 941 942 943 typedef struct PsPollUpsdStatistics_t 944 { 945 uint32 psPollTimeOuts; 946 uint32 upsdTimeOuts; 947 uint32 upsdMaxAPturn; 948 uint32 psPollMaxAPturn; 949 uint32 psPollUtilization; 950 uint32 upsdUtilization; 951 } PsPollUpsdStatistics_t; 952 953 typedef struct RxFilterStatistics_t 954 { 955 uint32 beaconFilter; 956 uint32 arpFilter; 957 uint32 MCFilter; 958 uint32 dupFilter; 959 uint32 dataFilter; 960 uint32 ibssFilter; 961 } RxFilterStatistics_t; 962 963 typedef struct ClaibrationFailStatistics_t 964 { 965 uint32 initCalTotal; 966 uint32 initRadioBandsFail; 967 uint32 initSetParams; 968 uint32 initTxClpcFail; 969 uint32 initRxIqMmFail; 970 uint32 tuneCalTotal; 971 uint32 tuneDrpwRTrimFail; 972 uint32 tuneDrpwPdBufFail; 973 uint32 tuneDrpwTxMixFreqFail; 974 uint32 tuneDrpwTaCal; 975 uint32 tuneDrpwRxIf2Gain; 976 uint32 tuneDrpwRxDac; 977 uint32 tuneDrpwChanTune; 978 uint32 tuneDrpwRxTxLpf; 979 uint32 tuneDrpwLnaTank; 980 uint32 tuneTxLOLeakFail; 981 uint32 tuneTxIqMmFail; 982 uint32 tuneTxPdetFail; 983 uint32 tuneTxPPAFail; 984 uint32 tuneTxClpcFail; 985 uint32 tuneRxAnaDcFail; 986 uint32 tuneRxIqMmFail; 987 uint32 calStateFail; 988 }ClaibrationFailStatistics_t; 989 990 typedef struct ACXStatisticsStruct 991 { 992 INFO_ELE_HDR 993 RingStatistics_t ringStat; 994 DbgStatistics_t debug; 995 TxStatistics_t tx; 996 RxStatistics_t rx; 997 DMAStatistics_t dma; 998 IsrStatistics_t isr; 999 WepStatistics_t wep; 1000 PwrStatistics_t pwr; 1001 AesStatistics_t aes; 1002 MicStatistics_t mic; 1003 EventStatistics_t event; 1004 PsPollUpsdStatistics_t ps; 1005 RxFilterStatistics_t rxFilter; 1006 ClaibrationFailStatistics_t radioCal; 1007 GemStatistics_t gem; 1008 } ACXStatistics_t; 1009 1010 /****************************************************************************** 1011 1012 Name: ACX_ROAMING_STATISTICS_TBL 1013 Desc: This information element reads the current roaming triggers 1014 counters/metrics. 1015 Type: Statistics 1016 Access: Read Only 1017 Length: 6 1018 1019 ******************************************************************************/ 1020 typedef struct 1021 { 1022 INFO_ELE_HDR 1023 uint32 MissedBeacons; /* The current number of consecutive lost beacons*/ 1024 uint8 snrData; /* The current average SNR in db - For Data Packets*/ 1025 uint8 snrBeacon; /* The current average SNR in db - For Beacon Packets*/ 1026 int8 rssiData; /* The current average RSSI - For Data Packets*/ 1027 int8 rssiBeacon; /* The current average RSSI - For Beacon Packets*/ 1028 }ACXRoamingStatisticsTable_t; 1029 1030 1031 /****************************************************************************** 1032 1033 Name: ACX_FEATURE_CFG 1034 Desc: Provides expandability for future features 1035 Type: Configuration 1036 Access: Write Only 1037 Length: 8 1038 1039 ******************************************************************************/ 1040 1041 /* bit defines for Option: */ 1042 #define FEAT_PCI_CLK_RUN_ENABLE 0x00000002 /* Enable CLK_RUN on PCI bus */ 1043 1044 /* bit defines for dataflowOptions: */ 1045 #define DF_ENCRYPTION_DISABLE 0x00000001 /* When set, enable encription in FW.*/ 1046 /* when clear, disable encription. */ 1047 #define DF_SNIFF_MODE_ENABLE 0x00000080 /* When set, enable decryption in FW.*/ 1048 /* when clear, disable decription. */ 1049 typedef struct 1050 { 1051 INFO_ELE_HDR 1052 uint32 Options; /* Data flow options - refer to above definitions*/ 1053 uint32 dataflowOptions; /* Data flow options - refer to above definitions*/ 1054 } ACXFeatureConfig_t; 1055 1056 1057 1058 /****************************************************************************** 1059 1060 Name: ACX_TID_CFG 1061 Type: Configuration 1062 Access: Write Only 1063 Length: 16 1064 1065 ******************************************************************************/ 1066 typedef enum 1067 { 1068 CHANNEL_TYPE_DCF = 0, /* DC/LEGACY*/ 1069 CHANNEL_TYPE_EDCF = 1, /* EDCA*/ 1070 CHANNEL_TYPE_HCCA = 2, /* HCCA*/ 1071 MAX_CHANNEL_TYPE = CHANNEL_TYPE_HCCA 1072 } ChannelType_enum; 1073 1074 typedef enum 1075 { 1076 PS_SCHEME_LEGACY = 0, /* Regular PS: simple sending of packets*/ 1077 PS_SCHEME_UPSD_TRIGGER = 1, /* UPSD: sending a packet triggers a UPSD downstream*/ 1078 PS_SCHEME_LEGACY_PSPOLL = 2, /* Legacy PSPOLL: a PSPOLL packet will be sent before */ 1079 /* every data packet transmission in this queue.*/ 1080 PS_SCHEME_SAPSD = 3, /* Scheduled APSD mode.*/ 1081 MAX_PS_SCHEME = PS_SCHEME_SAPSD 1082 } PSScheme_enum; 1083 1084 typedef enum 1085 { 1086 ACK_POLICY_LEGACY = 0, /* ACK immediate policy*/ 1087 ACK_POLICY_NO_ACK = 1, /* no ACK policy*/ 1088 ACK_POLICY_BLOCK = 2, /* block ack policy*/ 1089 MAX_ACK_POLICY = ACK_POLICY_BLOCK 1090 } AckPolicy_enum; 1091 1092 1093 #ifdef HOST_COMPILE 1094 typedef uint8 ChannelType_e; 1095 typedef uint8 PSScheme_e; 1096 typedef uint8 AckPolicy_e; 1097 #else 1098 typedef ChannelType_enum ChannelType_e; 1099 typedef PSScheme_enum PSScheme_e; 1100 typedef AckPolicy_enum AckPolicy_e; 1101 #endif 1102 1103 1104 1105 /* Michal recommendation: 1106 in the ACXTIDConfig_t structure we need only the fields psScheme, and one other field for AC id (queue? tsid?). 1107 the rest are obsolete. see IEPsDeliveryTriggerType_t in CE2.0. 1108 */ 1109 1110 typedef struct 1111 { 1112 INFO_ELE_HDR 1113 uint8 queueID; /* The TX queue ID number (0-7).*/ 1114 uint8 channelType; /* Channel access type for the queue.*/ 1115 /* Refer to ChannelType_enum.*/ 1116 uint8 tsid; /* for EDCA - the AC Index (0-3, refer to*/ 1117 /* AccessCategory_enum).*/ 1118 /* For HCCA - HCCA Traffic Stream ID (TSID) of */ 1119 /* the queue (8-15).*/ 1120 PSScheme_e psScheme; /* The power save scheme of the specified queue.*/ 1121 /* Refer to PSScheme_enum.*/ 1122 AckPolicy_e ackPolicy; /* The TX queue ACK policy. */ 1123 uint8 padding[3]; /* alignment to 32bits boundry */ 1124 uint32 APSDConf[2]; /* Not supported in this version !!!*/ 1125 }ACXTIDConfig_t; 1126 1127 1128 1129 /****************************************************************************** 1130 1131 Name: ACX_PS_RX_STREAMING 1132 Type: Configuration 1133 Access: Write Only 1134 Length: 32 1135 1136 ******************************************************************************/ 1137 typedef struct 1138 { 1139 INFO_ELE_HDR 1140 uint8 TID; /* The TID index*/ 1141 Bool_e rxPSDEnabled; /* indicates if this traffic stream requires */ 1142 /* employing an RX Streaming delivery mechanism for the TID*/ 1143 1144 uint8 streamPeriod; /* the time period for which a trigger needs to be transmitted*/ 1145 /* in case no data TX triggers are sent by host*/ 1146 uint8 txTimeout; /* the timeout from last TX trigger after which FW*/ 1147 /* starts generating triggers by itself*/ 1148 }ACXPsRxStreaming_t; 1149 1150 /************************************************************ 1151 * MULTIPLE RSSI AND SNR * 1152 *************************************************************/ 1153 1154 typedef enum 1155 { 1156 RX_QUALITY_EVENT_LEVEL = 0, /* The event is a "Level" indication which keeps */ 1157 /* triggering as long as the average RSSI is below*/ 1158 /* the threshold.*/ 1159 1160 RX_QUALITY_EVENT_EDGE = 1 /* The event is an "Edge" indication which triggers*/ 1161 /* only when the RSSI threshold is crossed from above.*/ 1162 }rxQualityEventType_enum; 1163 1164 /* The direction in which the trigger is active */ 1165 typedef enum 1166 { 1167 RSSI_EVENT_DIR_LOW = 0, 1168 RSSI_EVENT_DIR_HIGH = 1, 1169 RSSI_EVENT_DIR_BIDIR = 2 1170 }RssiEventDir_e; 1171 1172 /****************************************************************************** 1173 1174 RSSI/SNR trigger configuration: 1175 1176 ACX_RSSI_SNR_TRIGGER 1177 ACX_RSSI_SNR_WIGHTS 1178 1179 ******************************************************************************/ 1180 #define NUM_OF_RSSI_SNR_TRIGGERS 8 1181 typedef struct 1182 { 1183 int16 threshold; 1184 uint16 pacing; /* Minimum delay between consecutive triggers in milliseconds (0 - 60000) */ 1185 uint8 metric; /* RSSI Beacon, RSSI Packet, SNR Beacon, SNR Packet */ 1186 uint8 type; /* Level / Edge */ 1187 uint8 direction; /* Low, High, Bidirectional */ 1188 uint8 hystersis; /* Hysteresis range in dB around the threshold value (0 - 255) */ 1189 uint8 index; /* Index of Event. Values 0 - 7 */ 1190 uint8 enable; /* 1 - Configured, 2 - Not Configured; (for recovery using) */ 1191 uint8 padding[2]; 1192 }RssiSnrTriggerCfg_t; 1193 1194 typedef struct 1195 { 1196 INFO_ELE_HDR 1197 RssiSnrTriggerCfg_t param; 1198 }ACXRssiSnrTriggerCfg_t; 1199 1200 /* Filter Weight for every one of 4 RSSI /SNR Trigger Metrics */ 1201 typedef struct 1202 { 1203 uint8 rssiBeaconAverageWeight; 1204 uint8 rssiPacketAverageWeight; 1205 uint8 snrBeaconAverageWeight; 1206 uint8 snrPacketAverageWeight; 1207 }RssiSnrAverageWeights_t; 1208 1209 typedef struct 1210 { 1211 INFO_ELE_HDR 1212 RssiSnrAverageWeights_t param; 1213 }ACXRssiSnrAverageWeights_t; 1214 1215 typedef enum 1216 { 1217 METRIC_EVENT_RSSI_BEACON = 0, 1218 METRIC_EVENT_RSSI_DATA = 1, 1219 METRIC_EVENT_SNR_BEACON = 2, 1220 METRIC_EVENT_SNR_DATA = 3, 1221 METRIC_EVENT_TRIGGER_SIZE = 4 1222 }MetricEvent_e; 1223 1224 /****************************************************************************** 1225 1226 Name: ACX_NOISE_HIST 1227 Desc: Noise Histogram activation is done by special command from host which 1228 is responsible to read the results using this IE. 1229 Type: Configuration 1230 Access: Read Only 1231 Length: 48 (NOISE_HIST_LEN=8) 1232 1233 ******************************************************************************/ 1234 1235 typedef struct 1236 { 1237 INFO_ELE_HDR 1238 uint32 counters[NOISE_HIST_LEN]; /* This array of eight 32 bit counters describes */ 1239 /* the histogram created by the FW noise */ 1240 /* histogram engine.*/ 1241 1242 uint32 numOfLostCycles; /* This field indicates the number of measurement */ 1243 /* cycles with failure because Tx was active.*/ 1244 1245 uint32 numOfTxHwGenLostCycles; /* This field indicates the number of measurement */ 1246 /* cycles with failure because Tx (FW Generated)*/ 1247 /* was active.*/ 1248 1249 uint32 numOfRxLostCycles; /* This field indicates the number of measurement */ 1250 /* cycles because the Rx CCA was active. */ 1251 } NoiseHistResult_t; 1252 1253 /****************************************************************************** 1254 1255 Name: ACX_PD_THRESHOLD 1256 Type: Configuration 1257 Access: Write Only 1258 Length: 4 1259 1260 ******************************************************************************/ 1261 1262 typedef struct 1263 { 1264 INFO_ELE_HDR 1265 uint32 pdThreshold; /* The packet detection threshold in the PHY.*/ 1266 } ACXPacketDetection_t; 1267 1268 1269 /****************************************************************************** 1270 1271 Name: ACX_RATE_POLICY 1272 Type: Configuration 1273 Access: Write Only 1274 Length: 132 1275 1276 ******************************************************************************/ 1277 1278 #define HOST_MAX_RATE_POLICIES (8) 1279 1280 1281 typedef struct 1282 { 1283 INFO_ELE_HDR 1284 uint32 numOfClasses; /* The number of transmission rate */ 1285 /* fallback policy classes.*/ 1286 1287 txAttrClass_t rateClasses[HOST_MAX_RATE_POLICIES]; /* Rate Policies table*/ 1288 }ACXTxAttrClasses_t; 1289 1290 1291 1292 /****************************************************************************** 1293 1294 Name: ACX_CTS_PROTECTION 1295 Type: Configuration 1296 Access: Write Only 1297 Length: 1 1298 1299 ******************************************************************************/ 1300 1301 typedef struct 1302 { 1303 INFO_ELE_HDR 1304 uint8 ctsProtectMode; /* This field is a flag enabling or disabling the*/ 1305 /* CTS-to-self protection mechanism:*/ 1306 /* 0 - disable, 1 - enable*/ 1307 uint8 padding[3]; /* alignment to 32bits boundry */ 1308 }ACXCtsProtection_t; 1309 1310 /****************************************************************************** 1311 1312 ACX_FRAG_CFG 1313 1314 ******************************************************************************/ 1315 1316 typedef struct 1317 { 1318 INFO_ELE_HDR 1319 uint16 fragThreshold; 1320 uint8 padding[2]; /* alignment toIE_RTS_CTS_CFG 32bits boundry */ 1321 1322 } ACXFRAGThreshold_t; 1323 1324 1325 /****************************************************************************** 1326 1327 ACX_RX_CONFIG_OPT 1328 1329 ******************************************************************************/ 1330 typedef enum 1331 { 1332 RX_QUEUE_TYPE_RX_LOW_PRIORITY, /* All except the high priority */ 1333 RX_QUEUE_TYPE_RX_HIGH_PRIORITY, /* Management and voice packets */ 1334 RX_QUEUE_TYPE_NUM, 1335 RX_QUEUE_TYPE_MAX = MAX_POSITIVE8 1336 } RxQueueType_enum; 1337 1338 1339 #ifdef HOST_COMPILE 1340 typedef uint8 RxQueueType_e; 1341 #else 1342 typedef RxQueueType_enum RxQueueType_e; 1343 #endif 1344 1345 1346 typedef struct 1347 { 1348 INFO_ELE_HDR 1349 uint16 rxMblkThreshold; /* Occupied Rx mem-blocks number which requires interrupting the host (0 = no buffering) */ 1350 uint16 rxPktThreshold; /* Rx packets number which requires interrupting the host (0 = no buffering) */ 1351 uint16 rxCompleteTimeout; /* Max time in msec the FW may delay Rx-Complete interrupt */ 1352 RxQueueType_e rxQueueType; /* see above */ 1353 uint8 reserved; 1354 } ACXRxBufferingConfig_t; 1355 1356 1357 /****************************************************************************** 1358 1359 Name: ACX_SLEEP_AUTH 1360 Desc: configuration of sleep authorization level 1361 Type: System Configuration 1362 Access: Write Only 1363 Length: 1 1364 1365 ******************************************************************************/ 1366 1367 typedef struct 1368 { 1369 INFO_ELE_HDR 1370 uint8 sleepAuth; /* The sleep level authorization of the device. */ 1371 /* 0 - Always active*/ 1372 /* 1 - Power down mode: light / fast sleep*/ 1373 /* 2 - ELP mode: Deep / Max sleep*/ 1374 1375 uint8 padding[3]; /* alignment to 32bits boundry */ 1376 }ACXSleepAuth_t; 1377 1378 /****************************************************************************** 1379 1380 Name: ACX_PM_CONFIG 1381 Desc: configuration of power management 1382 Type: System Configuration 1383 Access: Write Only 1384 Length: 1 1385 1386 ******************************************************************************/ 1387 1388 typedef struct 1389 { 1390 INFO_ELE_HDR 1391 uint32 hostClkSettlingTime; /* Host CLK settling time (in uSec units) */ 1392 uint8 hostFastWakeupSupport; /* 0 - not supported */ 1393 /* 1 - supported */ 1394 uint8 padding[3]; /* alignment to 32bits boundry */ 1395 }ACXPMConfig_t; 1396 1397 /****************************************************************************** 1398 1399 Name: ACX_PREAMBLE_TYPE 1400 Type: Configuration 1401 Access: Write Only 1402 Length: 1 1403 1404 ******************************************************************************/ 1405 1406 typedef enum 1407 { 1408 LONG_PREAMBLE = 0, 1409 SHORT_PREAMBLE = 1, 1410 OFDM_PREAMBLE = 4, 1411 N_MIXED_MODE_PREAMBLE = 6, 1412 GREENFIELD_PREAMBLE = 7, 1413 PREAMBLE_INVALID = 0xFF 1414 } Preamble_enum; 1415 1416 1417 #ifdef HOST_COMPILE 1418 typedef uint8 Preamble_e; 1419 #else 1420 typedef Preamble_enum Preamble_e; 1421 #endif 1422 1423 1424 typedef struct 1425 { 1426 INFO_ELE_HDR 1427 Preamble_e preamble; /* When set, the WiLink transmits beacon, probe response, */ 1428 /* RTS and PS Poll frames with a short preamble. */ 1429 /* When clear, the WiLink transmits the frame with a long */ 1430 /* preamble.*/ 1431 uint8 padding[3]; /* alignment to 32bits boundry */ 1432 } ACXPreamble_t; 1433 1434 1435 /****************************************************************************** 1436 1437 Name: ACX_CCA_THRESHOLD 1438 Type: Configuration 1439 Access: Write Only 1440 Length: 2 1441 1442 ******************************************************************************/ 1443 1444 typedef struct 1445 { 1446 INFO_ELE_HDR 1447 uint16 rxCCAThreshold; /* The Rx Clear Channel Assessment threshold in the PHY*/ 1448 /* (the energy threshold).*/ 1449 Bool_e txEnergyDetection; /* The Tx ED value for TELEC Enable/Disable*/ 1450 uint8 padding; 1451 } ACXEnergyDetection_t; 1452 1453 1454 /****************************************************************************** 1455 1456 Name: ACX_EVENT_MBOX_MASK 1457 Type: Operation 1458 Access: Write Only 1459 Length: 8 1460 1461 ******************************************************************************/ 1462 1463 typedef struct 1464 { 1465 INFO_ELE_HDR 1466 uint32 lowEventMask; /* Indicates which events are masked and which are not*/ 1467 /* Refer to EventMBoxId_enum in public_event_mbox.h.*/ 1468 1469 uint32 highEventMask; /* Not in use (should always be set to 0xFFFFFFFF).*/ 1470 } ACXEventMboxMask_t; 1471 1472 1473 /****************************************************************************** 1474 1475 Name: ACX_CONN_MONIT_PARAMS 1476 Desc: This information element configures the SYNCHRONIZATION_TIMEOUT 1477 interrupt indicator. It configures the number of missed Beacons 1478 before issuing the SYNCHRONIZATION_TIMEOUT event. 1479 Type: Configuration 1480 Access: Write Only 1481 Length: 8 1482 1483 ******************************************************************************/ 1484 1485 typedef struct 1486 { 1487 INFO_ELE_HDR 1488 uint32 TSFMissedThreshold; /* The number of consecutive beacons that can be */ 1489 /* lost before the WiLink raises the */ 1490 /* SYNCHRONIZATION_TIMEOUT event.*/ 1491 1492 uint32 BSSLossTimeout; /* The delay (in time units) between the time at */ 1493 /* which the device issues the SYNCHRONIZATION_TIMEOUT*/ 1494 /* event until, if no probe response or beacon is */ 1495 /* received a BSS_LOSS event is issued.*/ 1496 } AcxConnectionMonitorOptions; 1497 1498 /****************************************************************************** 1499 1500 Name: ACX_CONS_TX_FAILURE 1501 Desc: This information element configures the number of frames transmission 1502 failures before issuing the "Max Tx Retry" event. The counter is 1503 incremented only for unicast frames or frames that require Ack 1504 Type: Configuration 1505 Access: Write Only 1506 Length: 1 1507 1508 ******************************************************************************/ 1509 1510 typedef struct 1511 { 1512 INFO_ELE_HDR 1513 uint8 maxTxRetry; /* the number of frames transmission failures before */ 1514 /* issuing the "Max Tx Retry" event*/ 1515 uint8 padding[3]; /* alignment to 32bits boundry */ 1516 } ACXConsTxFailureTriggerParameters_t; 1517 1518 1519 /****************************************************************************** 1520 1521 Name: ACX_BCN_DTIM_OPTIONS 1522 Type: Configuration 1523 Access: Write Only 1524 Length: 5 1525 1526 ******************************************************************************/ 1527 1528 typedef struct 1529 { 1530 INFO_ELE_HDR 1531 uint16 beaconRxTimeOut; 1532 uint16 broadcastTimeOut; 1533 uint8 rxBroadcastInPS; /* if set, enables receive of broadcast packets */ 1534 /* in Power-Save mode.*/ 1535 uint8 consecutivePsPollDeliveryFailureThr; /* Consecutive PS Poll Fail before updating the Driver */ 1536 uint8 padding[2]; /* alignment to 32bits boundry */ 1537 } ACXBeaconAndBroadcastOptions_t; 1538 1539 1540 /****************************************************************************** 1541 1542 Name: ACX_SG_ENABLE 1543 Desc: This command instructs the WiLink to set the Soft Gemini (BT co-existence) 1544 state to either enable/disable or sense mode. 1545 Type: Configuration 1546 Access: Write Only 1547 Length: 1 1548 1549 ******************************************************************************/ 1550 typedef struct 1551 { 1552 INFO_ELE_HDR 1553 uint8 coexOperationMode; /* 0- Co-ex operation is Disabled 1554 1- Co-ex operation is configured to Protective mode 1555 2- Co-ex operation is configured to Opportunistic mode 1556 1557 Default Value: 0- Co-ex operation is Disabled 1558 */ 1559 1560 uint8 padding[3]; /* alignment to 32bits boundry */ 1561 1562 } ACXBluetoothWlanCoEnableStruct; 1563 1564 1565 1566 /** \struct TSoftGeminiParams 1567 * \brief Soft Gemini Parameters 1568 * 1569 * \par Description 1570 * Used for Setting/Printing Soft Gemini Parameters 1571 * 1572 * \sa 1573 */ 1574 1575 typedef enum 1576 { 1577 SOFT_GEMINI_BT_PER_THRESHOLD = 0, 1578 SOFT_GEMINI_AUTO_SCAN_COMPENSATION_MAX_TIME, 1579 SOFT_GEMINI_BT_NFS_SAMPLE_INTERVAL, 1580 SOFT_GEMINI_BT_LOAD_RATIO, 1581 SOFT_GEMINI_AUTO_PS_MODE, 1582 SOFT_GEMINI_AUTO_SCAN_PROBE_REQ, 1583 SOFT_GEMINI_AUTO_SCAN_WINDOW, 1584 SOFT_GEMINI_ANTENNA_CONFIGURATION, 1585 SOFT_GEMINI_BEACON_MISS_PERCENT, 1586 SOFT_GEMINI_RATE_ADAPT_THRESH, 1587 SOFT_GEMINI_RATE_ADAPT_SNR, 1588 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MIN_BR, 1589 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MAX_BR, 1590 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_MASTER_BR, 1591 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MIN_BR, 1592 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MAX_BR, 1593 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_SLAVE_BR, 1594 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MIN_EDR, 1595 SOFT_GEMINI_WLAN_PS_BT_ACL_MASTER_MAX_EDR, 1596 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_MASTER_EDR, 1597 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MIN_EDR, 1598 SOFT_GEMINI_WLAN_PS_BT_ACL_SLAVE_MAX_EDR, 1599 SOFT_GEMINI_WLAN_PS_MAX_BT_ACL_SLAVE_EDR, 1600 SOFT_GEMINI_RXT, 1601 SOFT_GEMINI_TXT, 1602 SOFT_GEMINI_ADAPTIVE_RXT_TXT, 1603 SOFT_GEMINI_PS_POLL_TIMEOUT, 1604 SOFT_GEMINI_UPSD_TIMEOUT, 1605 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_MASTER_MIN_EDR, 1606 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_MASTER_MAX_EDR, 1607 SOFT_GEMINI_WLAN_ACTIVE_MAX_BT_ACL_MASTER_EDR, 1608 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_SLAVE_MIN_EDR, 1609 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_SLAVE_MAX_EDR, 1610 SOFT_GEMINI_WLAN_ACTIVE_MAX_BT_ACL_SLAVE_EDR, 1611 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_SLAVE_MIN_BR, 1612 SOFT_GEMINI_WLAN_ACTIVE_BT_ACL_SLAVE_MAX_BR, 1613 SOFT_GEMINI_WLAN_ACTIVE_MAX_BT_ACL_SLAVE_BR, 1614 SOFT_GEMINI_TEMP_PARAM_1, 1615 SOFT_GEMINI_TEMP_PARAM_2, 1616 SOFT_GEMINI_TEMP_PARAM_3, 1617 SOFT_GEMINI_TEMP_PARAM_4, 1618 SOFT_GEMINI_TEMP_PARAM_5, 1619 SOFT_GEMINI_PARAMS_MAX 1620 } softGeminiParams; 1621 1622 typedef struct 1623 { 1624 uint32 coexParams[SOFT_GEMINI_PARAMS_MAX]; 1625 uint8 paramIdx; /* the param index which the FW should update, if it equals to 0xFF - update all */ 1626 uint8 padding[3]; 1627 } TSoftGeminiParams; 1628 1629 1630 /****************************************************************************** 1631 1632 Name: ACX_SG_CFG 1633 Desc: This command instructs the WiLink to set the Soft Gemini (BT co-existence) 1634 parameters to the desired values. 1635 Type: Configuration 1636 Access: Write (Read For GWSI - disable for now) 1637 Length: 1 1638 1639 ******************************************************************************/ 1640 typedef struct 1641 1642 { 1643 INFO_ELE_HDR 1644 1645 TSoftGeminiParams softGeminiParams; 1646 } ACXBluetoothWlanCoParamsStruct; 1647 1648 /****************************************************************************** 1649 1650 Name: ACX_FM_COEX_CFG 1651 Desc: This command instructs the WiLink to set the FM co-existence 1652 parameters to the desired values. 1653 Type: Configuration 1654 Access: Write 1655 Length: 1656 1657 ******************************************************************************/ 1658 typedef struct 1659 1660 { 1661 INFO_ELE_HDR 1662 1663 uint8 enable; /* enable(1) / disable(0) the FM Coex feature */ 1664 1665 uint8 swallowPeriod; /* Swallow period used in COEX PLL swallowing mechanism, 1666 Range: 0-0xFF, 0xFF = use FW default 1667 */ 1668 1669 uint8 nDividerFrefSet1; /* The N divider used in COEX PLL swallowing mechanism for Fref of 38.4/19.2 Mhz. 1670 Range: 0-0xFF, 0xFF = use FW default 1671 */ 1672 1673 uint8 nDividerFrefSet2; /* The N divider used in COEX PLL swallowing mechanism for Fref of 26/52 Mhz. 1674 Range: 0-0xFF, 0xFF = use FW default 1675 */ 1676 1677 uint16 mDividerFrefSet1; /* The M divider used in COEX PLL swallowing mechanism for Fref of 38.4/19.2 Mhz. 1678 Range: 0-0x1FF, 0xFFFF = use FW default 1679 */ 1680 1681 uint16 mDividerFrefSet2; /* The M divider used in COEX PLL swallowing mechanism for Fref of 26/52 Mhz. 1682 Range: 0-0x1FF, 0xFFFF = use FW default 1683 */ 1684 1685 uint32 coexPllStabilizationTime; /* The time duration in uSec required for COEX PLL to stabilize. 1686 0xFFFFFFFF = use FW default 1687 */ 1688 1689 uint16 ldoStabilizationTime; /* The time duration in uSec required for LDO to stabilize. 1690 0xFFFFFFFF = use FW default 1691 */ 1692 1693 uint8 fmDisturbedBandMargin; /* The disturbed frequency band margin around the disturbed 1694 frequency center (single sided). 1695 For example, if 2 is configured, the following channels 1696 will be considered disturbed channel: 1697 80 +- 0.1 MHz, 91 +- 0.1 MHz, 98 +- 0.1 MHz, 102 +- 0.1 MHz 1698 0xFF = use FW default 1699 */ 1700 1701 uint8 swallowClkDif; /* The swallow clock difference of the swallowing mechanism. 1702 0xFF = use FW default 1703 */ 1704 1705 } ACXWlanFmCoexStruct; 1706 1707 1708 1709 /****************************************************************************** 1710 1711 Name: ACX_TSF_INFO 1712 Type: Operation 1713 Access: Read Only 1714 Length: 20 1715 1716 ******************************************************************************/ 1717 typedef struct ACX_fwTSFInformation 1718 { 1719 INFO_ELE_HDR 1720 uint32 CurrentTSFHigh; 1721 uint32 CurrentTSFLow; 1722 uint32 lastTBTTHigh; 1723 uint32 lastTBTTLow; 1724 uint8 LastDTIMCount; 1725 uint8 padding[3]; /* alignment to 32bits boundry */ 1726 }ACX_fwTSFInformation_t; 1727 1728 1729 /****************************************************************************** 1730 1731 Name: ACX_BET_ENABLE 1732 Desc: Enable or Disable the Beacon Early Termination module. In addition initialized the 1733 Max Dropped beacons parameter 1734 Type: Configuration 1735 Access: Write 1736 Length: 6 1737 Note: 1738 ******************************************************************************/ 1739 typedef struct 1740 1741 { 1742 INFO_ELE_HDR 1743 uint8 Enable; /* specifies if beacon early termination procedure is enabled or disabled: 0 disabled, 1 enabled */ 1744 uint8 MaximumConsecutiveET; /* specifies the maximum number of consecutive beacons that may be early terminated. After this number is reached 1745 at least one full beacon must be correctly received in FW before beacon ET resumes. Legal range: 0 255 */ 1746 uint8 padding[2]; 1747 }ACXBet_Enable_t; 1748 1749 1750 /****************************************************************************** 1751 1752 Name: DOT11_RX_MSDU_LIFE_TIME 1753 Type: Operation 1754 Access: Write Only 1755 Length: 4 1756 1757 ******************************************************************************/ 1758 1759 typedef struct 1760 { 1761 INFO_ELE_HDR 1762 uint32 RxMsduLifeTime; /* The maximum amount of time, in TU, that the WiLink */ 1763 /* should attempt to collect fragments of an MSDU before */ 1764 /* discarding them. */ 1765 /* The default value for this field is 512.*/ 1766 } dot11RxMsduLifeTime_t; 1767 1768 1769 /****************************************************************************** 1770 1771 Name: DOT11_CUR_TX_PWR 1772 Desc: This IE indicates the maximum TxPower in Dbm/10 currently being used to transmit data. 1773 Type: Operation 1774 Access: Write Only 1775 Length: 1 1776 1777 ******************************************************************************/ 1778 1779 typedef struct 1780 { 1781 INFO_ELE_HDR 1782 uint8 dot11CurrentTxPower; /* the max Power in Dbm/10 to be used to transmit data.*/ 1783 uint8 padding[3]; /* alignment to 32bits boundry */ 1784 } dot11CurrentTxPowerStruct ; 1785 1786 1787 /****************************************************************************** 1788 1789 Name: DOT11_RX_DOT11_MODE 1790 Desc: This IE indicates the current Rx Mode used by DSSS PHY. 1791 Type: Configuration 1792 Access: Write Only 1793 Length: 4 1794 1795 ******************************************************************************/ 1796 /* 1797 Possible values for Rx DOT11 Mode are the following: 1798 Value Description 1799 ===== =========== 1800 3 11g - processing of both a and b packet formats is enabled 1801 2 11b - processing of b packet format is enabled 1802 1 11a - processing of a packet format is enabled 1803 0 undefined 1804 */ 1805 1806 typedef struct 1807 { 1808 INFO_ELE_HDR 1809 uint32 dot11RxDot11Mode; /* refer to above table*/ 1810 } dot11RxDot11ModeStruct; 1811 1812 1813 /****************************************************************************** 1814 1815 Name: DOT11_RTS_THRESHOLD 1816 Type: Configuration 1817 Access: Write Only 1818 Length: 2 1819 1820 ******************************************************************************/ 1821 1822 typedef struct 1823 { 1824 INFO_ELE_HDR 1825 uint16 RTSThreshold; /* The number of octets in an MPDU, below which an */ 1826 /* RTS/CTS handshake is not performed.*/ 1827 1828 uint8 padding[2]; /* alignment to 32bits boundry */ 1829 }dot11RTSThreshold_t; 1830 1831 1832 /****************************************************************************** 1833 1834 Name: DOT11_GROUP_ADDRESS_TBL 1835 Desc: The variable lengths of MAC addresses that are define as listening for 1836 multicast. The field Number of groups identifies how many MAC Addresses 1837 are relevant in that information element. 1838 Type: Configuration 1839 Access: Write Only 1840 Length: up to 50 bytes 1841 1842 ******************************************************************************/ 1843 #define ADDRESS_GROUP_MAX (8) 1844 #define ADDRESS_GROUP_MAX_LEN (6 * ADDRESS_GROUP_MAX) 1845 typedef struct 1846 { 1847 INFO_ELE_HDR 1848 uint8 fltrState; /* 1 - multicast filtering is enabled. */ 1849 /* 0 - multicast filtering is disabled.*/ 1850 1851 uint8 numOfGroups; /* number of relevant multicast */ 1852 /* addresses.*/ 1853 1854 uint8 padding[2]; /* alignment to 32bits boundary */ 1855 uint8 dataLocation[ADDRESS_GROUP_MAX_LEN]; /* table of MAC addresses.*/ 1856 }dot11MulticastGroupAddrStart_t; 1857 1858 /****************************************************************************** 1859 1860 ACX_CONFIG_PS_WMM (Patch for Wi-Fi Bug) 1861 1862 ******************************************************************************/ 1863 1864 typedef struct 1865 { 1866 INFO_ELE_HDR 1867 uint32 ConfigPsOnWmmMode; /* TRUE - Configure PS to work on WMM mode - do not send the NULL/PS_POLL 1868 packets even if TIM is set. 1869 FALSE - Configure PS to work on Non-WMM mode - work according to the 1870 standard. */ 1871 } ACXConfigPsWmm_t; 1872 1873 /****************************************************************************** 1874 1875 1876 Name: ACX_SET_RX_DATA_FILTER 1877 Desc: This IE configure one filter in the data filter module. can be used 1878 for add / remove / modify filter. 1879 Type: Filtering Configuration 1880 Access: Write Only 1881 Length: 4 + size of the fields of the filter (can vary between filters) 1882 1883 ******************************************************************************/ 1884 /* data filter action */ 1885 1886 #ifdef HOST_COMPILE 1887 1888 #define FILTER_DROP 0 /* Packet will be dropped by the FW and wont be delivered to the driver. */ 1889 #define FILTER_SIGNAL 1 /* Packet will be delivered to the driver. */ 1890 #define FILTER_FW_HANDLE 2 /* Packet will be handled by the FW and wont be delivered to the driver. */ 1891 1892 #else 1893 1894 typedef enum { 1895 FILTER_DROP = 0, 1896 FILTER_SIGNAL , 1897 FILTER_FW_HANDLE, 1898 FILTER_MAX = 0xFF 1899 }filter_enum; 1900 1901 #endif 1902 1903 #ifdef HOST_COMPILE 1904 typedef uint8 filter_e; 1905 #else 1906 typedef filter_enum filter_e; 1907 #endif 1908 1909 /* data filter command */ 1910 #define REMOVE_FILTER 0 /* Remove filter */ 1911 #define ADD_FILTER 1 /* Add filter */ 1912 1913 /* limitation */ 1914 #define MAX_DATA_FILTERS 4 1915 #define MAX_DATA_FILTER_SIZE 90 1916 1917 typedef struct 1918 { 1919 INFO_ELE_HDR 1920 uint8 command; /* 0-remove, 1-add */ 1921 uint8 index; /* range 0-MAX_DATA_FILTERS */ 1922 filter_e action; /* action: FILTER_DROP, FILTER_SIGNAL, FILTER_FW_HANDLE */ 1923 uint8 numOfFields; /* number of field in specific filter */ 1924 uint8 FPTable; /* filter fields starts here. variable size. */ 1925 } DataFilterConfig_t; 1926 1927 /****************************************************************************** 1928 1929 Name: ACX_ENABLE_RX_DATA_FILTER 1930 Desc: This IE disable / enable the data filtering feature. in case the 1931 featue is enabled - default action should be set as well. 1932 Type: Filtering Configuration 1933 Access: Write Only 1934 Length: 2 1935 1936 ******************************************************************************/ 1937 1938 typedef struct 1939 { 1940 INFO_ELE_HDR 1941 uint8 enable; /* 1 - enable, 0 - disable the data data filtering feature */ 1942 filter_e action; /* default action that should be implemented for packets that wont 1943 match any of the filters, or in case no filter is configured */ 1944 } DataFilterDefault_t; 1945 1946 1947 /****************************************************************************** 1948 1949 Name: ACX_GET_DATA_FILTER_STATISTICS 1950 Desc: get statistics of the data filtering module. 1951 Type: Statistics 1952 Access: Read Only 1953 Length: 20 1954 1955 ******************************************************************************/ 1956 1957 typedef struct 1958 { 1959 INFO_ELE_HDR 1960 uint32 unmatchedPacketsCount; /* number of packets didn't match any filter (when the feature was enabled). */ 1961 uint32 matchedPacketsCount[MAX_DATA_FILTERS]; /* number of packets matching each of the filters */ 1962 } ACXDataFilteringStatistics_t; 1963 1964 1965 #ifdef RADIO_SCOPE 1966 /****************************************************************************** 1967 1968 ****************************************************************************** 1969 1970 Name: ACX_RS_ENABLE 1971 Desc: This command instructs the WiLink to set the Radio Scope functionality 1972 state to either enable/disable. 1973 Type: Configuration 1974 Access: Write Only 1975 Length: 1 1976 1977 ******************************************************************************/ 1978 typedef struct 1979 { 1980 INFO_ELE_HDR 1981 uint8 Enable; /* RadioScope feature will be enabled (1) or disabled(0) */ 1982 uint8 padding[3]; /* alignment to 32 bits */ 1983 } ACXRadioScopeEnableStruct; 1984 1985 /****************************************************************************** 1986 1987 Name: ACX_RS_RX 1988 Desc: This command instructs the WiLink to set the Radio Scope 1989 parameters to the desired values. 1990 Type: Configuration 1991 Access: Read/Write 1992 Length: 1 1993 1994 We have the following available memory area: 1995 1996 Information Element ID - 2 bytes 1997 Information Element Length - 2 bytes 1998 1999 Now the rest is MAX_CMD_PARAMS 2000 but 4 bytes must be subtracted 2001 because of the IE in Buffer. 2002 2003 2004 ******************************************************************************/ 2005 typedef struct 2006 { 2007 uint16 service; 2008 uint16 length; 2009 uint8 channel; 2010 uint8 band; 2011 uint8 status; 2012 uint8 padding[1]; /*32 bit padding */ 2013 }RxPacketStruct; 2014 2015 typedef struct 2016 { 2017 /* We have the following available memory area: */ 2018 /* */ 2019 /* Information Element ID - 2 bytes */ 2020 /* Information Element Length - 2 bytes */ 2021 /* Number Of Packets in Buffer - 2 bytes */ 2022 /* */ 2023 /* Now the rest is MAX_CMD_PARAMS */ 2024 /* but 2 bytes must be subtracted */ 2025 /* because of the Number Of Packets in Buffer. */ 2026 RxPacketStruct packet[(MAX_CMD_PARAMS-2)/sizeof(RxPacketStruct)]; 2027 }RxCyclicBufferStruct; 2028 2029 typedef struct 2030 2031 { 2032 INFO_ELE_HDR 2033 /*uint8 padding[MAX_CMD_PARAMS-4]; */ 2034 RxCyclicBufferStruct buf; 2035 } ACXRadioScopeRxParamsStruct; 2036 2037 #endif /* RADIO_SCOPE */ 2038 /****************************************************************************** 2039 Name: ACX_KEEP_ALIVE_MODE 2040 Desc: Set/Get the Keep Alive feature mode. 2041 Type: Configuration 2042 Access: Write 2043 Length: 4 - 1 for the mode + 3 for padding. 2044 2045 ******************************************************************************/ 2046 2047 typedef struct 2048 { 2049 INFO_ELE_HDR 2050 Bool_e modeEnabled; 2051 uint8 padding [3]; 2052 }AcxKeepAliveMode; 2053 2054 2055 /****************************************************************************** 2056 2057 Name: ACX_SET_KEEP_ALIVE_CONFIG 2058 Desc: Configure a KLV template parameters. 2059 Type: Configuration 2060 Access: Write Only 2061 Length: 8 2062 2063 ******************************************************************************/ 2064 2065 typedef enum 2066 { 2067 NO_TX = 0, 2068 PERIOD_ONLY 2069 } KeepAliveTrigger_enum; 2070 2071 #ifdef HOST_COMPILE 2072 typedef uint8 KeepAliveTrigger_e; 2073 #else 2074 typedef KeepAliveTrigger_enum KeepAliveTrigger_e; 2075 #endif 2076 2077 typedef enum 2078 { 2079 KLV_TEMPLATE_INVALID = 0, 2080 KLV_TEMPLATE_VALID, 2081 KLV_TEMPLATE_PENDING /* this option is FW internal only. host can only configure VALID or INVALID*/ 2082 } KeepAliveTemplateValidation_enum; 2083 2084 #ifdef HOST_COMPILE 2085 typedef uint8 KeepAliveTemplateValidation_e; 2086 #else 2087 typedef KeepAliveTemplateValidation_enum KeepAliveTemplateValidation_e; 2088 #endif 2089 2090 typedef struct 2091 { 2092 INFO_ELE_HDR 2093 uint32 period; /*at range 1000-3600000 (msec). (To allow better range for debugging)*/ 2094 uint8 index; 2095 KeepAliveTemplateValidation_e valid; 2096 KeepAliveTrigger_e trigger; 2097 uint8 padding; 2098 } AcxSetKeepAliveConfig_t; 2099 2100 /* 2101 * BA sessen interface structure 2102 */ 2103 typedef struct 2104 { 2105 INFO_ELE_HDR 2106 uint8 aMacAddress[6]; /* Mac address of: SA as receiver / RA as initiator */ 2107 uint8 uTid; /* TID */ 2108 uint8 uPolicy; /* Enable / Disable */ 2109 uint16 uWinSize; /* windows size in num of packet */ 2110 uint16 uInactivityTimeout; /* as initiator inactivity timeout in time units(TU) of 1024us / 2111 as receiver reserved */ 2112 } TAxcBaSessionInitiatorResponderPolicy; 2113 2114 /****************************************************************************** 2115 2116 Name: ACX_PEER_HT_CAP 2117 Desc: Configure HT capabilities - declare the capabilities of the peer 2118 we are connected to. 2119 Type: Configuration 2120 Access: Write Only 2121 Length: 2122 2123 ******************************************************************************/ 2124 2125 typedef struct 2126 { 2127 INFO_ELE_HDR 2128 uint32 uHtCapabilites; /* 2129 * bit 0 Allow HT Operation 2130 * bit 1 - Allow Greenfield format in TX 2131 * bit 2 Allow Short GI in TX 2132 * bit 3 Allow L-SIG TXOP Protection in TX 2133 * bit 4 Allow HT Control fields in TX. 2134 * Note, driver will still leave space for HT control in packets regardless 2135 * of the value of this field. FW will be responsible to drop the HT field 2136 * from any frame when this Bit is set to 0. 2137 * bit 5 - Allow RD initiation in TXOP. FW is allowed to initate RD. Exact policy 2138 * setting for this feature is TBD. 2139 * Note, this bit can only be set to 1 if bit 3 is set to 1. 2140 */ 2141 2142 uint8 aMacAddress[6]; /* 2143 * Indicates to which peer these capabilities are relevant. 2144 * Note, currently this value will be set to FFFFFFFFFFFF to indicate it is 2145 * relevant for all peers since we only support HT in infrastructure mode. 2146 * Later on this field will be relevant to IBSS/DLS operation 2147 */ 2148 2149 uint8 uAmpduMaxLength; /* 2150 * This the maximum a-mpdu length supported by the AP. The FW may not 2151 * exceed this length when sending A-MPDUs 2152 */ 2153 2154 uint8 uAmpduMinSpacing; /* This is the minimal spacing required when sending A-MPDUs to the AP. */ 2155 2156 } TAxcHtCapabilitiesIeFwInterface; 2157 2158 /* EHtCapabilitesFwBitMask mapping */ 2159 typedef enum 2160 { 2161 FW_CAP_BIT_MASK_HT_OPERATION = BIT_0, 2162 FW_CAP_BIT_MASK_GREENFIELD_FRAME_FORMAT = BIT_1, 2163 FW_CAP_BIT_MASK_SHORT_GI_FOR_20MHZ_PACKETS = BIT_2, 2164 FW_CAP_BIT_MASK_LSIG_TXOP_PROTECTION = BIT_3, 2165 FW_CAP_BIT_MASK_HT_CONTROL_FIELDS = BIT_4, 2166 FW_CAP_BIT_MASK_RD_INITIATION = BIT_5 2167 } EHtCapabilitesFwBitMask; 2168 2169 2170 /****************************************************************************** 2171 2172 Name: ACX_HT_BSS_OPERATION 2173 Desc: Configure HT capabilities - AP rules for behavior in the BSS. 2174 Type: Configuration 2175 Access: Write Only 2176 Length: 2177 2178 ******************************************************************************/ 2179 2180 typedef struct 2181 { 2182 INFO_ELE_HDR 2183 uint8 uRifsMode; /* Values: 0 RIFS not allowed, 1 RIFS allowed */ 2184 uint8 uHtProtection; /* Values: 0 3 like in spec */ 2185 uint8 uGfProtection; /* Values: 0 - GF protection not required, 1 GF protection required */ 2186 uint8 uHtTxBurstLimit; /* Values: 0 TX Burst limit not required, 1 TX Burst Limit required */ 2187 uint8 uDualCtsProtection; /* 2188 * Values: 0 Dual CTS protection not required, 1 Dual CTS Protection required 2189 * Note: When this value is set to 1 FW will protect all TXOP with RTS 2190 * frame and will not use CTS-to-self regardless of the value of the 2191 * ACX_CTS_PROTECTION information element 2192 */ 2193 uint8 padding[3]; 2194 2195 } TAxcHtInformationIeFwInterface; 2196 2197 /****************************************************************************** 2198 FwStaticData_t - information stored in command mailbox area after the Init 2199 process is complete 2200 2201 Note: This structure is passed to the host via the mailbox at Init-Complete 2202 without host request!! 2203 The host reads this structure before sending any configuration to the FW. 2204 ******************************************************************************/ 2205 2206 typedef struct 2207 { 2208 /* dot11StationIDStruct */ 2209 uint8 dot11StationID[6]; /* The MAC address for the STA.*/ 2210 uint8 padding[2]; /* alignment to 32bits boundry */ 2211 /* ACXRevision_t */ 2212 char FWVersion[20]; /* The WiLink firmware version, an ASCII string x.x.x.x.x */ 2213 /* that uniquely identifies the current firmware. */ 2214 /* The left most digit is incremented each time a */ 2215 /* significant change is made to the firmware, such as */ 2216 /* WLAN new project.*/ 2217 /* The second and third digit is incremented when major enhancements*/ 2218 /* are added or major fixes are made.*/ 2219 /* The fourth digit is incremented for each SP release */ 2220 /* and it indicants the costumer private branch */ 2221 /* The fifth digit is incremented for each build.*/ 2222 2223 uint32 HardWareVersion; /* This 4 byte field specifies the WiLink hardware version. */ 2224 /* bits 0 - 15: Reserved.*/ 2225 /* bits 16 - 23: Version ID - The WiLink version ID */ 2226 /* (1 = first spin, 2 = second spin, and so on).*/ 2227 /* bits 24 - 31: Chip ID - The WiLink chip ID. */ 2228 uint8 txPowerTable[NUMBER_OF_SUB_BANDS_E][NUM_OF_POWER_LEVEL]; /* Maximun Dbm in Dbm/10 units */ 2229 } FwStaticData_t; 2230 2231 /****************************************************************************** 2232 2233 2234 2235 ACX_TX_CONFIG_OPT 2236 2237 2238 2239 ******************************************************************************/ 2240 2241 typedef struct 2242 { 2243 INFO_ELE_HDR 2244 uint16 txCompleteTimeout; /* Max time in msec the FW may delay frame Tx-Complete interrupt */ 2245 uint16 txCompleteThreshold; /* Tx-Complete packets number which requires interrupting the host (0 = no buffering) */ 2246 } ACXTxConfigOptions_t; 2247 2248 2249 /****************************************************************************** 2250 2251 Name: ACX_PWR_CONSUMPTION_STATISTICS 2252 Desc: Retrieve time statistics of the different power states. 2253 Type: Configuration 2254 Access: Read Only 2255 Length: 20 2256 2257 ******************************************************************************/ 2258 2259 // Power Statistics 2260 typedef struct 2261 { 2262 INFO_ELE_HDR 2263 uint32 awakeTimeCnt_Low; 2264 uint32 awakeTimeCnt_Hi; 2265 uint32 powerDownTimeCnt_Low; 2266 uint32 powerDownTimeCnt_Hi; 2267 uint32 elpTimeCnt_Low; 2268 uint32 elpTimeCnt_Hi; 2269 uint32 ListenMode11BTimeCnt_Low; 2270 uint32 ListenMode11BTimeCnt_Hi; 2271 uint32 ListenModeOFDMTimeCnt_Low; 2272 uint32 ListenModeOFDMTimeCnt_Hi; 2273 }ACXPowerConsumptionTimeStat_t; 2274 2275 2276 /****************************************************************************** 2277 Name: ACX_BURST_MODE 2278 Desc: enable/disable burst mode in case TxOp limit != 0. 2279 Type: Configuration 2280 Access: Write 2281 Length: 1 - 2 for the mode + 3 for padding. 2282 2283 ******************************************************************************/ 2284 2285 typedef struct 2286 { 2287 INFO_ELE_HDR 2288 Bool_e enable; 2289 uint8 padding [3]; 2290 }AcxBurstMode; 2291 2292 2293 /****************************************************************************** 2294 Name: ACX_SET_RATE_MAMAGEMENT_PARAMS 2295 Desc: configure one of the configurable parameters in rate management module. 2296 Type: Configuration 2297 Access: Write 2298 Length: 8 bytes 2299 2300 ******************************************************************************/ 2301 typedef enum 2302 { 2303 RATE_MGMT_RETRY_SCORE_PARAM, 2304 RATE_MGMT_PER_ADD_PARAM, 2305 RATE_MGMT_PER_TH1_PARAM, 2306 RATE_MGMT_PER_TH2_PARAM, 2307 RATE_MGMT_MAX_PER_PARAM, 2308 RATE_MGMT_INVERSE_CURIOSITY_FACTOR_PARAM, 2309 RATE_MGMT_TX_FAIL_LOW_TH_PARAM, 2310 RATE_MGMT_TX_FAIL_HIGH_TH_PARAM, 2311 RATE_MGMT_PER_ALPHA_SHIFT_PARAM, 2312 RATE_MGMT_PER_ADD_SHIFT_PARAM, 2313 RATE_MGMT_PER_BETA1_SHIFT_PARAM, 2314 RATE_MGMT_PER_BETA2_SHIFT_PARAM, 2315 RATE_MGMT_RATE_CHECK_UP_PARAM, 2316 RATE_MGMT_RATE_CHECK_DOWN_PARAM, 2317 RATE_MGMT_RATE_RETRY_POLICY_PARAM, 2318 RATE_MGMT_ALL_PARAMS = 0xff 2319 } rateAdaptParam_enum; 2320 2321 #ifdef HOST_COMPILE 2322 typedef uint8 rateAdaptParam_e; 2323 #else 2324 typedef rateAdaptParam_enum rateAdaptParam_e; 2325 #endif 2326 2327 typedef struct 2328 { 2329 INFO_ELE_HDR 2330 rateAdaptParam_e paramIndex; 2331 uint16 RateRetryScore; 2332 uint16 PerAdd; 2333 uint16 PerTh1; 2334 uint16 PerTh2; 2335 uint16 MaxPer; 2336 uint8 InverseCuriosityFactor; 2337 uint8 TxFailLowTh; 2338 uint8 TxFailHighTh; 2339 uint8 PerAlphaShift; 2340 uint8 PerAddShift; 2341 uint8 PerBeta1Shift; 2342 uint8 PerBeta2Shift; 2343 uint8 RateCheckUp; 2344 uint8 RateCheckDown; 2345 uint8 RateRetryPolicy[13]; 2346 }AcxRateMangeParams; 2347 2348 /****************************************************************************** 2349 Name: ACX_GET_RATE_MAMAGEMENT_PARAMS 2350 Desc: read the configurable parameters of rate management module. 2351 Type: 2352 Access: read 2353 Length: 8 bytes 2354 2355 ******************************************************************************/ 2356 typedef struct 2357 { 2358 INFO_ELE_HDR 2359 int32 SNRCorrectionHighLimit; 2360 int32 SNRCorrectionLowLimit; 2361 int32 PERErrorTH; 2362 int32 attemptEvaluateTH; 2363 int32 goodAttemptTH; 2364 int32 curveCorrectionStep; 2365 }AcxRateMangeReadParams; 2366 2367 2368 2369 /****************************************************************************** 2370 2371 Name: ACX_SET_SMART_REFLEX_STATE 2372 Desc: Configure smart reflex state (enable/disable). 2373 Type: Configuration 2374 Access: Write Only 2375 Length: 2376 2377 ******************************************************************************/ 2378 2379 typedef struct 2380 { 2381 INFO_ELE_HDR 2382 Bool_e enable; 2383 uint8 padding [3]; 2384 }ACXSmartReflexState_t; 2385 2386 2387 /****************************************************************************** 2388 2389 Name: ACX_SET_SMART_REFLEX_DEBUG 2390 Desc: Configure smart reflex mechanism parameters - for debug mode. 2391 Type: Configuration 2392 Access: Write Only 2393 Length: 2394 2395 ******************************************************************************/ 2396 typedef struct 2397 { 2398 uint8 len; //maximum length is 14 2399 int8 upperLimit; 2400 int8 values[14]; //this is the maximum length (in rows) of the error table 2401 }SmartReflexErrTable_t; 2402 2403 typedef struct 2404 { 2405 INFO_ELE_HDR 2406 SmartReflexErrTable_t errorTable; 2407 uint16 senN_P; 2408 uint16 senNRN; 2409 uint16 senPRN; 2410 uint16 senN_P_Gain; 2411 }ACXSmartReflexDebugParams_t; 2412 2413 2414 /****************************************************************************** 2415 2416 Name: ACX_SET_SMART_REFLEX_PARAMS 2417 Desc: Configure smart reflex mechanism tables - 1 for each FAB. 2418 The FW will choose the correct FAB, according to what is burned in the Efuse. 2419 Type: Configuration 2420 Access: Write Only 2421 Length: 2422 2423 ******************************************************************************/ 2424 2425 typedef struct 2426 { 2427 INFO_ELE_HDR 2428 SmartReflexErrTable_t errorTable[3]; 2429 }ACXSmartReflexConfigParams_t; 2430 2431 #endif /* PUBLIC_INFOELE_H */ 2432 2433
