1 /**************************************************************************** 2 **+-----------------------------------------------------------------------+** 3 **| |** 4 **| Copyright(c) 1998 - 2008 Texas Instruments. All rights reserved. |** 5 **| All rights reserved. |** 6 **| |** 7 **| Redistribution and use in source and binary forms, with or without |** 8 **| modification, are permitted provided that the following conditions |** 9 **| are met: |** 10 **| |** 11 **| * Redistributions of source code must retain the above copyright |** 12 **| notice, this list of conditions and the following disclaimer. |** 13 **| * Redistributions in binary form must reproduce the above copyright |** 14 **| notice, this list of conditions and the following disclaimer in |** 15 **| the documentation and/or other materials provided with the |** 16 **| distribution. |** 17 **| * Neither the name Texas Instruments nor the names of its |** 18 **| contributors may be used to endorse or promote products derived |** 19 **| from this software without specific prior written permission. |** 20 **| |** 21 **| THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |** 22 **| "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |** 23 **| LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |** 24 **| A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |** 25 **| OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |** 26 **| SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |** 27 **| LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |** 28 **| DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |** 29 **| THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |** 30 **| (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |** 31 **| OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |** 32 **| |** 33 **+-----------------------------------------------------------------------+** 34 ****************************************************************************/ 35 36 #ifndef RATES_TYPES_H 37 #define RATES_TYPES_H 38 39 typedef enum 40 { 41 DRV_RATE_AUTO = 0, 42 DRV_RATE_1M = 1, 43 DRV_RATE_2M = 2, 44 DRV_RATE_5_5M = 3, 45 DRV_RATE_11M = 4, 46 DRV_RATE_22M = 5, 47 DRV_RATE_6M = 6, 48 DRV_RATE_9M = 7, 49 DRV_RATE_12M = 8, 50 DRV_RATE_18M = 9, 51 DRV_RATE_24M = 10, 52 DRV_RATE_36M = 11, 53 DRV_RATE_48M = 12, 54 DRV_RATE_54M = 13, 55 DRV_RATE_MAX = 13, 56 DRV_RATE_INVALID= 0xFF 57 } rate_e; 58 59 60 typedef enum 61 { 62 DRV_RATE_MASK_AUTO = DRV_RATE_AUTO, /*0x0000,*/ 63 DRV_RATE_MASK_1_BARKER = (1<<(DRV_RATE_1M - 1)), /*0x0001,*/ 64 DRV_RATE_MASK_2_BARKER = (1<<(DRV_RATE_2M - 1)), /*0x0002,*/ 65 DRV_RATE_MASK_5_5_CCK = (1<<(DRV_RATE_5_5M - 1)), /*0x0004,*/ 66 DRV_RATE_MASK_11_CCK = (1<<(DRV_RATE_11M - 1)), /*0x0008,*/ 67 DRV_RATE_MASK_22_PBCC = (1<<(DRV_RATE_22M - 1)), /*0x0010,*/ 68 DRV_RATE_MASK_6_OFDM = (1<<(DRV_RATE_6M - 1)), /*0x0020,*/ 69 DRV_RATE_MASK_9_OFDM = (1<<(DRV_RATE_9M - 1)), /*0x0040,*/ 70 DRV_RATE_MASK_12_OFDM = (1<<(DRV_RATE_12M - 1)), /*0x0080,*/ 71 DRV_RATE_MASK_18_OFDM = (1<<(DRV_RATE_18M - 1)), /*0x0100,*/ 72 DRV_RATE_MASK_24_OFDM = (1<<(DRV_RATE_24M - 1)), /*0x0200,*/ 73 DRV_RATE_MASK_36_OFDM = (1<<(DRV_RATE_36M - 1)), /*0x0400,*/ 74 DRV_RATE_MASK_48_OFDM = (1<<(DRV_RATE_48M - 1)), /*0x0800,*/ 75 DRV_RATE_MASK_54_OFDM = (1<<(DRV_RATE_54M - 1)), /*0x1000*/ 76 } rateMask_e; 77 78 /*GWSI_RATE*/ 79 #define GWSI_1Mbits 0x00000001 80 #define GWSI_2Mbits 0x00000002 81 #define GWSI_5_5Mbits 0x00000004 82 #define GWSI_6Mbits 0x00000008 83 #define GWSI_9Mbits 0x00000010 84 #define GWSI_11Mbits 0x00000020 85 #define GWSI_12Mbits 0x00000040 86 #define GWSI_18Mbits 0x00000080 87 #define GWSI_22Mbits 0x00000100 88 #define GWSI_24Mbits 0x00000200 89 #define GWSI_36Mbits 0x00000800 90 #define GWSI_48Mbits 0x00001000 91 #define GWSI_54Mbits 0x00002000 92 93 /*HW_RATE*/ 94 #define HW_RATE_1M (0x0A) 95 #define HW_RATE_2M (0x14) 96 #define HW_RATE_5_5M (0x37) 97 #define HW_RATE_5_5M_PBCC (0xB7) 98 #define HW_RATE_11M (0x6E) 99 #define HW_RATE_11M_PBCC (0xEE) 100 #define HW_RATE_22M_PBCC (0xDC) 101 #define HW_RATE_6M (0x0B) 102 #define HW_RATE_9M (0x0F) 103 #define HW_RATE_12M (0x0A) 104 #define HW_RATE_18M (0x0E) 105 #define HW_RATE_24M (0x09) 106 #define HW_RATE_36M (0x0D) 107 #define HW_RATE_48M (0x08) 108 #define HW_RATE_54M (0x0C) 109 110 #define HW_BIT_RATE_1MBPS 0x00000001 111 #define HW_BIT_RATE_2MBPS 0x00000002 112 #define HW_BIT_RATE_5_5MBPS 0x00000004 113 #define HW_BIT_RATE_6MBPS 0x00000008 114 #define HW_BIT_RATE_9MBPS 0x00000010 115 #define HW_BIT_RATE_11MBPS 0x00000020 116 #define HW_BIT_RATE_12MBPS 0x00000040 117 #define HW_BIT_RATE_18MBPS 0x00000080 118 #define HW_BIT_RATE_22MBPS 0x00000100 119 #define HW_BIT_RATE_24MBPS 0x00000200 120 #define HW_BIT_RATE_36MBPS 0x00000400 121 #define HW_BIT_RATE_48MBPS 0x00000800 122 #define HW_BIT_RATE_54MBPS 0x00001000 123 124 125 #define SHORT_PREAMBLE_BIT BIT_0 /*CCK or Barker depending on the rate*/ 126 #define OFDM_MOD_TYPE BIT_6 127 #define PBCC_MOD_TYPE BIT_7 128 129 typedef enum 130 { 131 MOD_PBCC = 1, 132 MOD_CCK, 133 MOD_OFDM 134 }Modulation_e; 135 136 137 #endif 138 139
