1 /* 2 * 'Standard' SDIO HOST CONTROLLER driver 3 * 4 * Copyright (C) 1999-2010, Broadcom Corporation 5 * 6 * Unless you and Broadcom execute a separate written software license 7 * agreement governing use of this software, this software is licensed to you 8 * under the terms of the GNU General Public License version 2 (the "GPL"), 9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 10 * following added to such license: 11 * 12 * As a special exception, the copyright holders of this software give you 13 * permission to link this software with independent modules, and to copy and 14 * distribute the resulting executable under terms of your choice, provided that 15 * you also meet, for each linked independent module, the terms and conditions of 16 * the license of that module. An independent module is a module which is not 17 * derived from this software. The special exception does not apply to any 18 * modifications of the software. 19 * 20 * Notwithstanding the above, under no circumstances may you combine this 21 * software in any way with any other Broadcom software provided under a license 22 * other than the GPL, without Broadcom's express prior written consent. 23 * 24 * $Id: bcmsdstd.h,v 13.16.18.1.16.3 2009/12/10 01:09:23 Exp $ 25 */ 26 27 /* global msglevel for debug messages - bitvals come from sdiovar.h */ 28 29 #define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) 30 #define sd_trace(x) 31 #define sd_info(x) 32 #define sd_debug(x) 33 #define sd_data(x) 34 #define sd_ctrl(x) 35 #define sd_dma(x) 36 37 #define sd_sync_dma(sd, read, nbytes) 38 #define sd_init_dma(sd) 39 #define sd_ack_intr(sd) 40 #define sd_wakeup(sd); 41 /* Allocate/init/free per-OS private data */ 42 extern int sdstd_osinit(sdioh_info_t *sd); 43 extern void sdstd_osfree(sdioh_info_t *sd); 44 45 #define sd_log(x) 46 47 #define SDIOH_ASSERT(exp) \ 48 do { if (!(exp)) \ 49 printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ 50 } while (0) 51 52 #define BLOCK_SIZE_4318 64 53 #define BLOCK_SIZE_4328 512 54 55 /* internal return code */ 56 #define SUCCESS 0 57 #define ERROR 1 58 59 /* private bus modes */ 60 #define SDIOH_MODE_SPI 0 61 #define SDIOH_MODE_SD1 1 62 #define SDIOH_MODE_SD4 2 63 64 #define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */ 65 #define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */ 66 67 #define SDIOH_TYPE_ARASAN_HDK 1 68 #define SDIOH_TYPE_BCM27XX 2 69 #define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */ 70 #define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */ 71 #define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */ 72 73 /* For linux, allow yielding for dongle */ 74 #define BCMSDYIELD 75 76 /* Expected card status value for CMD7 */ 77 #define SDIOH_CMD7_EXP_STATUS 0x00001E00 78 79 #define RETRIES_LARGE 100000 80 #define RETRIES_SMALL 100 81 82 83 #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ 84 #define USE_MULTIBLOCK 0x4 85 86 #define USE_FIFO 0x8 /* Fifo vs non-fifo */ 87 88 #define CLIENT_INTR 0x100 /* Get rid of this! */ 89 90 91 struct sdioh_info { 92 uint cfg_bar; /* pci cfg address for bar */ 93 uint32 caps; /* cached value of capabilities reg */ 94 uint32 curr_caps; /* max current capabilities reg */ 95 96 osl_t *osh; /* osh handler */ 97 volatile char *mem_space; /* pci device memory va */ 98 uint lockcount; /* nest count of sdstd_lock() calls */ 99 bool client_intr_enabled; /* interrupt connnected flag */ 100 bool intr_handler_valid; /* client driver interrupt handler valid */ 101 sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ 102 void *intr_handler_arg; /* argument to call interrupt handler */ 103 bool initialized; /* card initialized */ 104 uint target_dev; /* Target device ID */ 105 uint16 intmask; /* Current active interrupts */ 106 void *sdos_info; /* Pointer to per-OS private data */ 107 108 uint32 controller_type; /* Host controller type */ 109 uint8 version; /* Host Controller Spec Compliance Version */ 110 uint irq; /* Client irq */ 111 int intrcount; /* Client interrupts */ 112 int local_intrcount; /* Controller interrupts */ 113 bool host_init_done; /* Controller initted */ 114 bool card_init_done; /* Client SDIO interface initted */ 115 bool polled_mode; /* polling for command completion */ 116 117 bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ 118 /* Must be on for sd_multiblock to be effective */ 119 bool use_client_ints; /* If this is false, make sure to restore */ 120 /* polling hack in wl_linux.c:wl_timer() */ 121 int adapter_slot; /* Maybe dealing with multiple slots/controllers */ 122 int sd_mode; /* SD1/SD4/SPI */ 123 int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ 124 uint32 data_xfer_count; /* Current transfer */ 125 uint16 card_rca; /* Current Address */ 126 int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */ 127 uint8 num_funcs; /* Supported funcs on client */ 128 uint32 com_cis_ptr; 129 uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; 130 void *dma_buf; /* DMA Buffer virtual address */ 131 ulong dma_phys; /* DMA Buffer physical address */ 132 void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */ 133 ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */ 134 135 /* adjustments needed to make the dma align properly */ 136 void *dma_start_buf; 137 ulong dma_start_phys; 138 uint alloced_dma_size; 139 void *adma2_dscr_start_buf; 140 ulong adma2_dscr_start_phys; 141 uint alloced_adma2_dscr_size; 142 143 int r_cnt; /* rx count */ 144 int t_cnt; /* tx_count */ 145 bool got_hcint; /* local interrupt flag */ 146 uint16 last_intrstatus; /* to cache intrstatus */ 147 }; 148 149 #define DMA_MODE_NONE 0 150 #define DMA_MODE_SDMA 1 151 #define DMA_MODE_ADMA1 2 152 #define DMA_MODE_ADMA2 3 153 #define DMA_MODE_ADMA2_64 4 154 #define DMA_MODE_AUTO -1 155 156 #define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE)) 157 158 /* SDIO Host Control Register DMA Mode Definitions */ 159 #define SDIOH_SDMA_MODE 0 160 #define SDIOH_ADMA1_MODE 1 161 #define SDIOH_ADMA2_MODE 2 162 #define SDIOH_ADMA2_64_MODE 3 163 164 #define ADMA2_ATTRIBUTE_VALID (1 << 0) /* ADMA Descriptor line valid */ 165 #define ADMA2_ATTRIBUTE_END (1 << 1) /* End of Descriptor */ 166 #define ADMA2_ATTRIBUTE_INT (1 << 2) /* Interrupt when line is done */ 167 #define ADMA2_ATTRIBUTE_ACT_NOP (0 << 4) /* Skip current line, go to next. */ 168 #define ADMA2_ATTRIBUTE_ACT_RSV (1 << 4) /* Same as NOP */ 169 #define ADMA1_ATTRIBUTE_ACT_SET (1 << 4) /* ADMA1 Only - set transfer length */ 170 #define ADMA2_ATTRIBUTE_ACT_TRAN (2 << 4) /* Transfer Data of one descriptor line. */ 171 #define ADMA2_ATTRIBUTE_ACT_LINK (3 << 4) /* Link Descriptor */ 172 173 /* ADMA2 Descriptor Table Entry for 32-bit Address */ 174 typedef struct adma2_dscr_32b { 175 uint32 len_attr; 176 uint32 phys_addr; 177 } adma2_dscr_32b_t; 178 179 /* ADMA1 Descriptor Table Entry */ 180 typedef struct adma1_dscr { 181 uint32 phys_addr_attr; 182 } adma1_dscr_t; 183 184 /************************************************************ 185 * Internal interfaces: per-port references into bcmsdstd.c 186 */ 187 188 /* Global message bits */ 189 extern uint sd_msglevel; 190 191 /* OS-independent interrupt handler */ 192 extern bool check_client_intr(sdioh_info_t *sd); 193 194 /* Core interrupt enable/disable of device interrupts */ 195 extern void sdstd_devintr_on(sdioh_info_t *sd); 196 extern void sdstd_devintr_off(sdioh_info_t *sd); 197 198 /* Enable/disable interrupts for local controller events */ 199 extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err); 200 extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err); 201 202 /* Wait for specified interrupt and error bits to be set */ 203 extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err); 204 205 206 /************************************************************** 207 * Internal interfaces: bcmsdstd.c references to per-port code 208 */ 209 210 /* Register mapping routines */ 211 extern uint32 *sdstd_reg_map(osl_t *osh, int32 addr, int size); 212 extern void sdstd_reg_unmap(osl_t *osh, int32 addr, int size); 213 214 /* Interrupt (de)registration routines */ 215 extern int sdstd_register_irq(sdioh_info_t *sd, uint irq); 216 extern void sdstd_free_irq(uint irq, sdioh_info_t *sd); 217 218 /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ 219 extern void sdstd_lock(sdioh_info_t *sd); 220 extern void sdstd_unlock(sdioh_info_t *sd); 221 222 /* OS-specific wait-for-interrupt-or-status */ 223 extern uint16 sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield); 224
