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    Searched defs:cpuid (Results 1 - 16 of 16) sorted by null

  /bionic/libc/kernel/arch-x86/asm/
alternative_32.h 22 u8 cpuid; member in struct:alt_instr
  /development/ndk/platforms/android-5/arch-x86/include/asm/
alternative_32.h 22 u8 cpuid; member in struct:alt_instr
  /external/chromium/base/
atomicops_internals_x86_gcc.cc 19 // Inline cpuid instruction. In PIC compilations, %ebx contains the address
21 // must preserve that register's value across cpuid instructions.
23 #define cpuid(a, b, c, d, inp) \ macro
25 "cpuid\n" \
29 #define cpuid(a, b, c, d, inp) \ macro
31 "cpuid\n" \
36 #if defined(cpuid) // initialize the struct only on x86
53 // Get vendor string (issue CPUID with eax = 0)
54 cpuid(eax, ebx, ecx, edx, 0);
62 cpuid(eax, ebx, ecx, edx, 1)
    [all...]
  /prebuilt/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/asm/
alternative_32.h 22 u8 cpuid; member in struct:alt_instr
  /prebuilt/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/asm/
alternative_32.h 22 u8 cpuid; member in struct:alt_instr
  /external/kernel-headers/original/asm-x86/
alternative_32.h 11 u8 cpuid; /* cpuid bit set for replacement */ member in struct:alt_instr
msr.h 229 static inline void cpuid(int op, unsigned int *eax, unsigned int *ebx, function
232 __asm__("cpuid"
240 /* Some CPUID calls want 'count' to be placed in ecx */
244 __asm__("cpuid"
253 * CPUID functions returning a single datum
259 __asm__("cpuid"
269 __asm__("cpuid"
279 __asm__("cpuid"
289 __asm__("cpuid"
paravirt.h 111 /* cpuid emulation, mostly so that caps bits can be disabled */
112 void (*cpuid)(unsigned int *eax, unsigned int *ebx, member in struct:pv_cpu_ops
474 /* The paravirtualized CPUID instruction. */
478 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
processor_32.h 59 int cpuid_level; /* Maximum supported CPUID level, -1=no CPUID */
75 unsigned char x86_max_cores; /* cpuid returned max cores value */
141 __asm__("cpuid"
181 asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory");
600 * Generic CPUID function
604 static inline void cpuid(unsigned int op, function
613 /* Some CPUID calls want 'count' to be placed in ecx */
624 * CPUID functions returning a single datum
630 cpuid(op, &eax, &ebx, &ecx, &edx)
    [all...]
  /prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/
msr.h 86 static __inline__ void cpuid(int op, unsigned int *eax, unsigned int *ebx, function
89 __asm__("cpuid"
97 /* Some CPUID calls want 'count' to be placed in ecx */
101 __asm__("cpuid"
110 * CPUID functions returning a single datum
116 __asm__("cpuid"
126 __asm__("cpuid"
136 __asm__("cpuid"
146 __asm__("cpuid"
  /external/libvpx/vpx_ports/
x86.h 39 #define cpuid(func,ax,bx,cx,dx)\ macro
41 "cpuid \n\t" \
45 #define cpuid(func,ax,bx,cx,dx)\ macro
48 "cpuid \n\t" \
57 #define cpuid(func,a,b,c,d) do{\ macro
62 #define cpuid(func,a,b,c,d)\ macro
64 __asm cpuid\
102 /* Ensure that the CPUID instruction supports extended features */
103 cpuid(0, reg_eax, reg_ebx, reg_ecx, reg_edx);
109 cpuid(1, reg_eax, reg_ebx, reg_ecx, reg_edx)
    [all...]
  /external/qemu/distrib/sdl-1.2.12/src/cpuinfo/
SDL_cpuinfo.c 71 " movl $1,%0 # We have CPUID support \n"
79 CPUid by definition. But it's nice to be able to prove it. :) */
91 " movl $1,%0 # We have CPUID support \n"
109 mov has_CPUID,1 ; We have CPUID support
152 " xorl %%eax,%%eax # Set up for CPUID instruction \n"
153 " cpuid # Get and save vendor ID \n"
154 " cmpl $1,%%eax # Make sure 1 is valid input for CPUID\n"
155 " jl 1f # We dont have the CPUID instruction\n"
158 " cpuid # Get family/model/stepping/features\n"
168 xor eax, eax ; Set up for CPUID instructio
169 cpuid ; Get and save vendor ID local
174 cpuid ; Get family\/model\/stepping\/features local
221 cpuid ; Get extended function limit local
225 cpuid ; and get the information local
    [all...]
  /external/webkit/JavaScriptCore/assembler/
MacroAssemblerX86Common.h 972 mov eax, 1 // cpuid function 1 gives us the standard feature set
973 cpuid; local
980 "cpuid;"
  /external/qemu/
kqemu.c 97 #define cpuid(index, eax, ebx, ecx, edx) \ macro
98 asm volatile ("cpuid" \
144 cpuid(1, eax, ebx, ecx, edx);
158 /* XXX: we could update more of the target CPUID state so that the
  /external/v8/src/ia32/
assembler-ia32.cc 66 Label cpuid, done; local
75 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported.
84 __ xor_(eax, Operand(edx)); // Different if CPUID is supported.
85 __ j(not_zero, &cpuid);
87 // CPUID not supported. Clear the supported features in edx:eax.
92 // Invoke CPUID with 1 in eax to get feature information in
93 // ecx:edx. Temporarily enable CPUID support because we know it's
95 __ bind(&cpuid);
97 supported_ = (1 << CPUID);
98 { Scope fscope(CPUID);
369 void Assembler::cpuid() { function in class:v8::internal::Assembler
    [all...]
  /external/v8/src/x64/
assembler-x64.cc 54 Label cpuid, done; local
63 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported.
72 __ xor_(rax, rdx); // Different if CPUID is supported.
73 __ j(not_zero, &cpuid);
75 // CPUID not supported. Clear the supported features in edx:eax.
79 // Invoke CPUID with 1 in eax to get feature information in
80 // ecx:edx. Temporarily enable CPUID support because we know it's
82 __ bind(&cpuid);
84 supported_ = kDefaultCpuFeatures | (1 << CPUID);
85 { Scope fscope(CPUID);
870 void Assembler::cpuid() { function in class:v8::internal::Assembler
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