/frameworks/base/media/libstagefright/codecs/amrwb/src/ |
mime_io.cpp | 570 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 571 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 572 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 573 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 576 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 577 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 578 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 582 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 583 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; 585 sorted_bits_into_int16[*(pt_AmrWbSortingTables++)] = BIT_1; [all...] |
get_amr_wb_bits.cpp | 127 if (*((*prms)++) == BIT_1) 132 if (*((*prms)++) == BIT_1) 143 if (*((*prms)++) == BIT_1) 158 if (*((*prms)++) == BIT_1)
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pvamrwbdecoder_cnst.h | 134 #define BIT_1 (int16)127
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/hardware/ti/omap3/omx/audio/src/openmax_il/g729_dec/tests/ |
G729DecTest.h | 53 #define BIT_1 0x0081 /* definition of bit 1 in ITU input bit-stream */
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/system/wlan/ti/sta_dk_4_0_4_32/common/src/hal/FirmwareApi/ |
public_host_int.h | 49 #define ACX_INTR_TX_RESULT BIT_1 /* TX result(s) are in the TX complete buffer */ 76 #define INTR_TRIG_EVENT_ACK BIT_1 /* Host Event Acknowlegde Interrupt. The host */
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public_types.h | 116 #define BIT_1 0x00000002 320 #define STOP_TOGGLE_MONADC_EN BIT_1
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public_descriptors.h | 182 TX_UNAVAILABLE_PRIORITY = BIT_1
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public_event_mbox.h | 77 RESERVED2_EVENT_ID = BIT_1,
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ti_types.h | 60 #define BIT_1 0x00000002
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public_commands.h | 326 #define CFG_RX_RAW BIT_1 /* 1 = write all data from baseband to frame buffer including PHY header.*/ 349 #define CFG_RX_RCTS_ACK BIT_1 /* rts, cts, ack frames.*/ [all...] |
/frameworks/base/media/libstagefright/codecs/amrnb/common/include/ |
bitno_tab.h | 80 #define BIT_1 1
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/hardware/ti/wlan/wl1271/TWD/FirmwareApi/ |
public_host_int.h | 55 #define ACX_INTR_INIT_COMPLETE BIT_1 /* Init sequence is done (masked interrupt, detection through polling only ) */ 80 #define INTR_TRIG_EVENT_ACK BIT_1 /* Host Event Acknowlegde Interrupt. The host */
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public_types.h | 135 #define BIT_1 0x00000002 230 HW_BIT_RATE_2MBPS = BIT_1 , 342 #define STOP_TOGGLE_MONADC_EN BIT_1
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public_event_mbox.h | 80 RSSI_SNR_TRIGGER_1_EVENT_ID = BIT_1,
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public_commands.h | 308 #define CFG_RX_RAW BIT_1 /* 1 = write all data from baseband to frame buffer including PHY header.*/ 331 #define CFG_RX_RCTS_ACK BIT_1 /* rts, cts, ack frames.*/ 577 #define JOIN_CMD_CTRL_TX_SESSION (BIT_3 | BIT_2 | BIT_1) [all...] |
public_descriptors.h | 66 #define TX_ATTR_HEADER_PAD BIT_1
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/system/wlan/ti/wilink_6_1/TWD/FirmwareApi/ |
public_host_int.h | 55 #define ACX_INTR_INIT_COMPLETE BIT_1 /* Init sequence is done (masked interrupt, detection through polling only ) */ 80 #define INTR_TRIG_EVENT_ACK BIT_1 /* Host Event Acknowlegde Interrupt. The host */
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public_types.h | 135 #define BIT_1 0x00000002 230 HW_BIT_RATE_2MBPS = BIT_1 , 342 #define STOP_TOGGLE_MONADC_EN BIT_1
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public_event_mbox.h | 80 RSSI_SNR_TRIGGER_1_EVENT_ID = BIT_1,
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public_commands.h | 308 #define CFG_RX_RAW BIT_1 /* 1 = write all data from baseband to frame buffer including PHY header.*/ 331 #define CFG_RX_RCTS_ACK BIT_1 /* rts, cts, ack frames.*/ 577 #define JOIN_CMD_CTRL_TX_SESSION (BIT_3 | BIT_2 | BIT_1) [all...] |
public_descriptors.h | 66 #define TX_ATTR_HEADER_PAD BIT_1
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/frameworks/base/media/libstagefright/codecs/amrwbenc/inc/ |
bits.h | 46 #define BIT_1 (Word16)127
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/frameworks/base/media/libstagefright/codecs/amrwbenc/src/ |
bits.c | 146 if (prms[sort_ptr[coding_mode][i-1]] == BIT_1)
201 *--(*prms) = BIT_1;
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/external/apache-http/src/org/apache/commons/codec/binary/ |
BinaryCodec.java | 50 private static final int BIT_1 = 0x02; 70 private static final int[] BITS = {BIT_0, BIT_1, BIT_2, BIT_3, BIT_4, BIT_5, BIT_6, BIT_7};
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/system/wlan/ti/sta_dk_4_0_4_32/common/src/hal/hl_ctrl/ |
whalRecovery.c | 412 #define HEALTH_REPORT_HOST2FW_SEQ_ERROR BIT_1
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