/bionic/libc/kernel/arch-sh/asm/ |
irqflags_64.h | 15 #include <cpu/registers.h>
|
mmu_context_64.h | 15 #include <cpu/registers.h>
|
/dalvik/dx/src/com/android/dx/dex/code/ |
SimpleInsn.java | 33 * @param registers {@code non-null;} register list, including a 34 * result register if appropriate (that is, registers may be either 38 RegisterSpecList registers) { 39 super(opcode, position, registers); 50 public DalvInsn withRegisters(RegisterSpecList registers) { 51 return new SimpleInsn(getOpcode(), getPosition(), registers);
|
HighRegisterPrefix.java | 27 * {@code move*} instructions to move a set of registers into 28 * registers starting at {@code 0} sequentially. This is used 41 * @param registers {@code non-null;} source registers 44 RegisterSpecList registers) { 45 super(position, registers); 47 if (registers.size() == 0) { 48 throw new IllegalArgumentException("registers.size() == 0"); 87 RegisterSpecList registers = getRegisters(); local 88 int sz = registers.size() 114 RegisterSpecList registers = getRegisters(); local [all...] |
VariableSizeInsn.java | 31 * @param registers {@code non-null;} source registers 34 RegisterSpecList registers) { 35 super(Dops.SPECIAL_FORMAT, position, registers);
|
CstInsn.java | 49 * @param registers {@code non-null;} register list, including a 50 * result register if appropriate (that is, registers may be either 55 RegisterSpecList registers, Constant constant) { 56 super(opcode, position, registers); 86 public DalvInsn withRegisters(RegisterSpecList registers) { 88 new CstInsn(getOpcode(), getPosition(), registers, constant);
|
TargetInsn.java | 36 * @param registers {@code non-null;} register list, including a 37 * result register if appropriate (that is, registers may be either 42 RegisterSpecList registers, CodeAddress target) { 43 super(opcode, position, registers); 60 public DalvInsn withRegisters(RegisterSpecList registers) { 61 return new TargetInsn(getOpcode(), getPosition(), registers, target);
|
DalvInsn.java | 43 private final RegisterSpecList registers; field in class:DalvInsn 81 * absolutely no registers (e.g., a {@code nop} or a 88 * @param registers {@code non-null;} register list, including a 89 * result register if appropriate (that is, registers may be either 93 RegisterSpecList registers) { 102 if (registers == null) { 103 throw new NullPointerException("registers == null"); 109 this.registers = registers; 125 if (registers.size() != 0) [all...] |
FixedSizeInsn.java | 34 * absolutely no registers (e.g., a {@code nop} or a 41 * @param registers {@code non-null;} register list, including a 42 * result register if appropriate (that is, registers may be either 46 RegisterSpecList registers) { 47 super(opcode, position, registers);
|
CodeAddress.java | 42 public final DalvInsn withRegisters(RegisterSpecList registers) {
|
LocalEnd.java | 65 public DalvInsn withRegisters(RegisterSpecList registers) {
|
LocalStart.java | 73 public DalvInsn withRegisters(RegisterSpecList registers) {
|
OddSpacer.java | 56 public DalvInsn withRegisters(RegisterSpecList registers) {
|
/dalvik/vm/compiler/template/armv5te-vfp/ |
TEMPLATE_MEM_OP_DECODE.S | 10 vpush {d0-d15} @ save out all fp registers 11 push {r0-r12,lr} @ save out all registers 16 pop {r0-r12,lr} @ restore all registers 17 vpop {d0-d15} @ restore all fp registers
|
/system/core/toolbox/ |
syren.c | 26 static syren_reg registers[] = { variable 47 for (i = 0; registers[i].name != 0; i++) { 48 if (!strcasecmp(registers[i].name, name)) 49 return ®isters[i]; 106 fprintf(stderr, "can only read all registers\n"); 110 for (i = 0; registers[i].name; i++) { 111 sio.page = registers[i].page; 112 sio.addr = registers[i].addr; 114 fprintf(stderr, "%s: error\n", registers[i].name); 116 fprintf(stderr, "%s: %04x\n", registers[i].name, sio.value) [all...] |
/dalvik/vm/compiler/template/armv5te/ |
TEMPLATE_MEM_OP_DECODE.S | 10 push {r0-r12,lr} @ save out all registers 15 pop {r0-r12,lr} @ restore all registers
|
/external/webkit/JavaScriptCore/runtime/ |
JSVariableObject.h | 57 Register& registerAt(int index) const { return d->registers[index]; } 70 JSVariableObjectData(SymbolTable* symbolTable, Register* registers) 72 , registers(registers) 78 Register* registers; // "r" in the register file. member in struct:JSC::JSVariableObject::JSVariableObjectData 79 OwnArrayPtr<Register> registerArray; // Independent copy of registers, used when a variable object copies its registers out of the register file. 160 inline void JSVariableObject::setRegisters(Register* registers, Register* registerArray) 164 d->registers = registers; [all...] |
Arguments.h | 43 Register* registers; member in struct:JSC::ArgumentsData 83 d->registers = &activation->registerAt(0); 128 argv = callFrame->registers() - RegisterFile::CallFrameHeaderSize - numParameters; 130 argv = callFrame->registers() - RegisterFile::CallFrameHeaderSize - numParameters - argc; 151 d->registers = callFrame->registers(); 191 Register* argv = callFrame->registers() - RegisterFile::CallFrameHeaderSize - numArguments - 1; 213 memcpy(registerArray, d->registers - registerOffset, registerArraySize * sizeof(Register)); 215 d->registers = registerArray + registerOffset; 233 Register* registerArray = copyRegisterArray(d()->registers - registerOffset, registerArraySize) [all...] |
JSActivation.h | 76 JSActivationData(NonNullPassRefPtr<FunctionExecutable> _functionExecutable, Register* registers) 77 : JSVariableObjectData(_functionExecutable->generatedBytecode().symbolTable(), registers)
|
Arguments.cpp | 77 buffer[i] = d->registers[d->firstParameterIndex + i].jsValue(); 87 buffer[i] = d->registers[d->firstParameterIndex + i].jsValue(); 115 args.initialize(&d->registers[d->firstParameterIndex], d->numArguments); 122 args.append(d->registers[d->firstParameterIndex + i].jsValue()); 132 args.append(d->registers[d->firstParameterIndex + i].jsValue()); 148 slot.setRegisterSlot(&d->registers[d->firstParameterIndex + i]); 163 slot.setRegisterSlot(&d->registers[d->firstParameterIndex + i]); 188 descriptor.setDescriptor(d->registers[d->firstParameterIndex + i].jsValue(), DontEnum); 224 d->registers[d->firstParameterIndex + i] = JSValue(value); 239 d->registers[d->firstParameterIndex + i] = JSValue(value) [all...] |
/external/v8/src/ |
interpreter-irregexp.cc | 193 int* registers, 233 *backtrack_sp++ = registers[insn >> BYTECODE_SHIFT]; 237 registers[insn >> BYTECODE_SHIFT] = Load32Aligned(pc + 4); 241 registers[insn >> BYTECODE_SHIFT] += Load32Aligned(pc + 4); 245 registers[insn >> BYTECODE_SHIFT] = current + Load32Aligned(pc + 4); 249 current = registers[insn >> BYTECODE_SHIFT]; 253 registers[insn >> BYTECODE_SHIFT] = 258 backtrack_sp = backtrack_stack_base + registers[insn >> BYTECODE_SHIFT]; 277 registers[insn >> BYTECODE_SHIFT] = *backtrack_sp; 471 if (registers[insn >> BYTECODE_SHIFT] < Load32Aligned(pc + 4)) [all...] |
/external/jpeg/ |
jmemdosa.asm | 17 ; we save and restore all 8086 registers, even though most compilers only 46 push si ; save all registers for safety 61 open_err: pop ds ; restore registers and exit 81 push si ; save all registers for safety 93 close_err: pop ds ; restore registers and exit 113 push si ; save all registers for safety 127 seek_err: pop ds ; restore registers and exit 147 push si ; save all registers for safety 165 read_err: pop ds ; restore registers and exit 185 push si ; save all registers for safet [all...] |
/external/qemu/distrib/sdl-1.2.12/src/hermes/ |
mmx_main.asm | 37 ; Save the registers used by the blitters, necessary for optimized code 62 ; Restore the registers used by the blitters, necessary for optimized code
|
x86_main.asm | 39 ; Save the registers used by the blitters, necessary for optimized code 63 ; Restore the registers used by the blitters, necessary for optimized code
|
/external/v8/test/mjsunit/ |
codegen-coverage.js | 30 // Test paths in the code generator where values in specific registers 40 // get values in specific registers (ia32, x64): 48 // The call will spill registers and leave x in {eax,rax}. 59 // Locals are in the corresponding registers here. 89 // left, all available registers on the right, and a non-smi result.
|