| /dalvik/vm/compiler/codegen/arm/ |
| Ralloc.h | 44 static inline int dvmCompilerS2VReg(CompilationUnit *cUnit, int sReg)
46 assert(sReg != INVALID_SREG);
47 return DECODE_REG(dvmConvertSSARegToDalvik(cUnit, sReg));
57 * Get the "real" sreg number associated with an sReg slot. In general,
58 * sReg values passed through codegen are the SSA names created by
71 static inline bool dvmCompilerLiveOut(CompilationUnit *cUnit, int sReg)
98 extern void dvmCompilerMarkLive(CompilationUnit *cUnit, int reg, int sReg);
181 /* Clobber any temp associated with an sReg. Could be in either class */
182 extern void dvmCompilerClobberSReg(CompilationUnit *cUnit, int sReg);
[all...] |
| RallocUtil.c | 55 #define SREG(c, s) ((c)->regLocation[(s)].sRegLow)
57 * Get the "real" sreg number associated with an sReg slot. In general,
58 * sReg values passed through codegen are the SSA names created by
92 regs[i].sReg = INVALID_SREG;
103 p[i].dirty, p[i].sReg,(int)p[i].defStart, (int)p[i].defEnd);
140 if (dvmCompilerS2VReg(cUnit, info2->sReg) <
141 dvmCompilerS2VReg(cUnit, info1->sReg))
144 dvmCompilerS2VReg(cUnit, info1->sReg) << 2,
155 dvmCompilerS2VReg(cUnit, info->sReg) << 2
[all...] |
| CodegenFactory.c | 261 * Perform null-check on a register. sReg is the ssa register being checked,
263 * indicates that sReg has been checked before the check request is ignored.
265 static ArmLIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg,
269 if (dvmIsBitSet(cUnit->regPool->nullCheckedRegs, sReg)) {
272 dvmSetBit(cUnit->regPool->nullCheckedRegs, sReg);
|
| CodegenCommon.c | 279 * return the target Dalvik sReg[s] and convert the next to a
|
| ArmLIR.h | 109 int sReg; // Name of live value
[all...] |
| /external/v8/src/arm/ |
| simulator-arm.cc | 578 void Simulator::set_s_register(int sreg, unsigned int value) {
579 ASSERT((sreg >= 0) && (sreg < num_s_registers));
580 vfp_register[sreg] = value;
584 unsigned int Simulator::get_s_register(int sreg) const {
585 ASSERT((sreg >= 0) && (sreg < num_s_registers));
586 return vfp_register[sreg];
590 void Simulator::set_s_register_from_float(int sreg, const float flt) {
591 ASSERT((sreg >= 0) && (sreg < num_s_registers))
[all...] |
| simulator-arm.h | 136 void set_s_register_from_float(int sreg, const float dbl);
137 float get_float_from_s_register(int sreg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Factory.c | 556 OpSize size, int sReg)
559 * on base (which must have an associated sReg and MIR). If not
678 int sReg)
681 size, sReg);
686 int sReg)
689 kLong, sReg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Factory.c | 802 * on base (which must have an associated sReg and MIR). If not
807 OpSize size, int sReg)
832 -1, kWord, sReg);
924 int sReg)
927 size, sReg);
932 int sReg)
935 kLong, sReg);
[all...] |
| /dalvik/vm/mterp/x86-atom/ |
| footer.S | 176 subl $$1, sReg0 # sReg<- sReg--
248 movl %ecx, sReg0 # sReg<- methodToCall
|
| /external/qemu/ |
| gdbstub.c | 589 #define LOAD_SEG(index, sreg)\
591 if (tmp != env->segs[sreg].selector)\
592 cpu_x86_load_seg(env, sreg, tmp);
596 #define LOAD_SEG(index, sreg) do {} while(0)
[all...] |
| /external/qemu/target-arm/ |
| translate.c | 1191 int sreg; local
1192 sreg = reg * 2 + n;
1193 return vfp_reg_offset(0, sreg);
[all...] |
