Lines Matching refs:Instr
205 Instr* pc = reinterpret_cast<Instr*>(pc_);
206 Instr* instr = reinterpret_cast<Instr*>(instructions);
208 *(pc + i) = *(instr + i);
345 static const Instr kPopInstruction =
349 static const Instr kPushRegPattern =
353 static const Instr kPopRegPattern =
356 const Instr kMovLrPc = al | 13*B21 | pc.code() | lr.code() * B12;
358 const Instr kLdrPCPattern = al | B26 | L | pc.code() * B16;
455 Instr instr = instr_at(pos);
456 if ((instr & ~Imm24Mask) == 0) {
458 return instr - (Code::kHeaderSize - kHeapObjectTag);
460 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
461 int imm26 = ((instr & Imm24Mask) << 8) >> 6;
462 if ((instr & CondMask) == nv && (instr & B24) != 0)
471 Instr instr = instr_at(pos);
472 if ((instr & ~Imm24Mask) == 0) {
480 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx imm24
481 if ((instr & CondMask) == nv) {
484 instr = (instr & ~(B24 | Imm24Mask)) | ((imm26 & 2) >> 1)*B24;
487 instr &= ~Imm24Mask;
491 instr_at_put(pos, instr | (imm24 & Imm24Mask));
505 Instr instr = instr_at(l.pos());
506 if ((instr & ~Imm24Mask) == 0) {
509 ASSERT((instr & 7*B25) == 5*B25); // b, bl, or blx
510 int cond = instr & CondMask;
517 if ((instr & B24) != 0)
612 Instr* instr) {
623 if (instr != NULL && (*instr & 0xd*B21) == 0xd*B21) {
625 *instr ^= 0x2*B21;
652 void Assembler::addrmod1(Instr instr,
657 ASSERT((instr & ~(CondMask | OpCodeMask | S)) == 0);
663 !fits_shifter(x.imm32_, &rotate_imm, &immed_8, &instr)) {
670 Condition cond = static_cast<Condition>(instr & CondMask);
671 if ((instr & ~CondMask) == 13*B21) { // mov, S not set
675 addrmod1(instr, rn, rd, Operand(ip));
679 instr |= I | rotate_imm*B8 | immed_8;
682 instr |= x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
686 instr |= x.rs_.code()*B8 | x.shift_op_ | B4 | x.rm_.code();
688 emit(instr | rn.code()*B16 | rd.code()*B12);
695 void Assembler::addrmod2(Instr instr, Register rd, const MemOperand& x) {
696 ASSERT((instr & ~(CondMask | B | L)) == B26);
708 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
710 static_cast<Condition>(instr & CondMask));
711 addrmod2(instr, rd, MemOperand(x.rn_, ip, x.am_));
715 instr |= offset_12;
721 instr |= B25 | x.shift_imm_*B7 | x.shift_op_ | x.rm_.code();
724 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
728 void Assembler::addrmod3(Instr instr, Register rd, const MemOperand& x) {
729 ASSERT((instr & ~(CondMask | L | S6 | H)) == (B4 | B7));
742 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
744 static_cast<Condition>(instr & CondMask));
745 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
749 instr |= B | (offset_8 >> 4)*B8 | (offset_8 & 0xf);
753 ASSERT(!x.rn_.is(ip) && ((instr & L) == L || !rd.is(ip)));
755 static_cast<Condition>(instr & CondMask));
756 addrmod3(instr, rd, MemOperand(x.rn_, ip, x.am_));
761 instr |= x.rm_.code();
764 emit(instr | am | x.rn_.code()*B16 | rd.code()*B12);
768 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
769 ASSERT((instr & ~(CondMask | P | U | W | L)) == B27);
772 emit(instr | rn.code()*B16 | rl);
776 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
779 (instr & ~(CondMask | CoprocessorMask | P | U | N | W | L)));
797 emit(instr | am | x.rn_.code()*B16 | crd.code()*B12 | offset_8);
1096 Instr instr;
1109 instr = I | rotate_imm*B8 | immed_8;
1112 instr = src.rm_.code();
1114 emit(cond | instr | B24 | B21 | fields | 15*B12);
1869 Instr instr = instr_at(rinfo.pc());
1873 ASSERT((instr & (7*B25 | P | U | B | W | 15*B16 | Off12Mask)) ==
1876 ASSERT(delta >= -4); // instr could be ldr pc, [pc, #-4] followed by targ32
1878 instr &= ~U;
1882 instr_at_put(rinfo.pc(), instr + delta);
