Lines Matching refs:base
287 void push_m(int offset, RegisterID base)
289 m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_PUSH, base, offset);
292 void pop_m(int offset, RegisterID base)
294 m_formatter.oneByteOp(OP_GROUP1A_Ev, GROUP1A_OP_POP, base, offset);
317 void addl_mr(int offset, RegisterID base, RegisterID dst)
319 m_formatter.oneByteOp(OP_ADD_GvEv, dst, base, offset);
322 void addl_rm(RegisterID src, int offset, RegisterID base)
324 m_formatter.oneByteOp(OP_ADD_EvGv, src, base, offset);
338 void addl_im(int imm, int offset, RegisterID base)
341 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_ADD, base, offset);
344 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_ADD, base, offset);
366 void addq_im(int imm, int offset, RegisterID base)
369 m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_ADD, base, offset);
372 m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_ADD, base, offset);
394 void andl_mr(int offset, RegisterID base, RegisterID dst)
396 m_formatter.oneByteOp(OP_AND_GvEv, dst, base, offset);
399 void andl_rm(RegisterID src, int offset, RegisterID base)
401 m_formatter.oneByteOp(OP_AND_EvGv, src, base, offset);
415 void andl_im(int imm, int offset, RegisterID base)
418 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_AND, base, offset);
421 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_AND, base, offset);
460 void negl_m(int offset, RegisterID base)
462 m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NEG, base, offset);
470 void notl_m(int offset, RegisterID base)
472 m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NOT, base, offset);
480 void orl_mr(int offset, RegisterID base, RegisterID dst)
482 m_formatter.oneByteOp(OP_OR_GvEv, dst, base, offset);
485 void orl_rm(RegisterID src, int offset, RegisterID base)
487 m_formatter.oneByteOp(OP_OR_EvGv, src, base, offset);
501 void orl_im(int imm, int offset, RegisterID base)
504 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_OR, base, offset);
507 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_OR, base, offset);
546 void subl_mr(int offset, RegisterID base, RegisterID dst)
548 m_formatter.oneByteOp(OP_SUB_GvEv, dst, base, offset);
551 void subl_rm(RegisterID src, int offset, RegisterID base)
553 m_formatter.oneByteOp(OP_SUB_EvGv, src, base, offset);
567 void subl_im(int imm, int offset, RegisterID base)
570 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_SUB, base, offset);
573 base, offset);
612 void xorl_mr(int offset, RegisterID base, RegisterID dst)
614 m_formatter.oneByteOp(OP_XOR_GvEv, dst, base, offset);
617 void xorl_rm(RegisterID src, int offset, RegisterID base)
619 m_formatter.oneByteOp(OP_XOR_EvGv, src, base, offset);
622 void xorl_im(int imm, int offset, RegisterID base)
625 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_XOR, base, offset);
628 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_XOR, base, offset);
714 void imull_mr(int offset, RegisterID base, RegisterID dst)
716 m_formatter.twoByteOp(OP2_IMUL_GvEv, dst, base, offset);
737 void cmpl_rm(RegisterID src, int offset, RegisterID base)
739 m_formatter.oneByteOp(OP_CMP_EvGv, src, base, offset);
742 void cmpl_mr(int offset, RegisterID base, RegisterID src)
744 m_formatter.oneByteOp(OP_CMP_GvEv, src, base, offset);
764 void cmpl_im(int imm, int offset, RegisterID base)
767 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, base, offset);
770 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, offset);
775 void cmpl_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
778 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, base, index, scale, offset);
781 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, index, scale, offset);
786 void cmpl_im_force32(int imm, int offset, RegisterID base)
788 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, offset);
798 void cmpq_rm(RegisterID src, int offset, RegisterID base)
800 m_formatter.oneByteOp64(OP_CMP_EvGv, src, base, offset);
803 void cmpq_mr(int offset, RegisterID base, RegisterID src)
805 m_formatter.oneByteOp64(OP_CMP_GvEv, src, base, offset);
819 void cmpq_im(int imm, int offset, RegisterID base)
822 m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_CMP, base, offset);
825 m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, offset);
830 void cmpq_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
833 m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_CMP, base, index, scale, offset);
836 m_formatter.oneByteOp64(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, index, scale, offset);
858 void cmpw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
861 m_formatter.oneByteOp(OP_CMP_EvGv, src, base, index, scale, offset);
864 void cmpw_im(int imm, int offset, RegisterID base, RegisterID index, int scale)
868 m_formatter.oneByteOp(OP_GROUP1_EvIb, GROUP1_OP_CMP, base, index, scale, offset);
872 m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, index, scale, offset);
888 void testl_i32m(int imm, int offset, RegisterID base)
890 m_formatter.oneByteOp(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, offset);
894 void testl_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale)
896 m_formatter.oneByteOp(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, index, scale, offset);
912 void testq_i32m(int imm, int offset, RegisterID base)
914 m_formatter.oneByteOp64(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, offset);
918 void testq_i32m(int imm, int offset, RegisterID base, RegisterID index, int scale)
920 m_formatter.oneByteOp64(OP_GROUP3_EvIz, GROUP3_OP_TEST, base, index, scale, offset);
986 void movl_rm(RegisterID src, int offset, RegisterID base)
988 m_formatter.oneByteOp(OP_MOV_EvGv, src, base, offset);
991 void movl_rm_disp32(RegisterID src, int offset, RegisterID base)
993 m_formatter.oneByteOp_disp32(OP_MOV_EvGv, src, base, offset);
996 void movl_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
998 m_formatter.oneByteOp(OP_MOV_EvGv, src, base, index, scale, offset);
1011 void movl_mr(int offset, RegisterID base, RegisterID dst)
1013 m_formatter.oneByteOp(OP_MOV_GvEv, dst, base, offset);
1016 void movl_mr_disp32(int offset, RegisterID base, RegisterID dst)
1018 m_formatter.oneByteOp_disp32(OP_MOV_GvEv, dst, base, offset);
1021 void movl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
1023 m_formatter.oneByteOp(OP_MOV_GvEv, dst, base, index, scale, offset);
1032 void movl_i32m(int imm, int offset, RegisterID base)
1034 m_formatter.oneByteOp(OP_GROUP11_EvIz, GROUP11_MOV, base, offset);
1054 void movq_rm(RegisterID src, int offset, RegisterID base)
1056 m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, offset);
1059 void movq_rm_disp32(RegisterID src, int offset, RegisterID base)
1061 m_formatter.oneByteOp64_disp32(OP_MOV_EvGv, src, base, offset);
1064 void movq_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
1066 m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, index, scale, offset);
1081 void movq_mr(int offset, RegisterID base, RegisterID dst)
1083 m_formatter.oneByteOp64(OP_MOV_GvEv, dst, base, offset);
1086 void movq_mr_disp32(int offset, RegisterID base, RegisterID dst)
1088 m_formatter.oneByteOp64_disp32(OP_MOV_GvEv, dst, base, offset);
1091 void movq_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
1093 m_formatter.oneByteOp64(OP_MOV_GvEv, dst, base, index, scale, offset);
1096 void movq_i32m(int imm, int offset, RegisterID base)
1098 m_formatter.oneByteOp64(OP_GROUP11_EvIz, GROUP11_MOV, base, offset);
1138 void movzwl_mr(int offset, RegisterID base, RegisterID dst)
1140 m_formatter.twoByteOp(OP2_MOVZX_GvEw, dst, base, offset);
1143 void movzwl_mr(int offset, RegisterID base, RegisterID index, int scale, RegisterID dst)
1145 m_formatter.twoByteOp(OP2_MOVZX_GvEw, dst, base, index, scale, offset);
1156 void leal_mr(int offset, RegisterID base, RegisterID dst)
1158 m_formatter.oneByteOp(OP_LEA, dst, base, offset);
1161 void leaq_mr(int offset, RegisterID base, RegisterID dst)
1163 m_formatter.oneByteOp64(OP_LEA, dst, base, offset);
1181 void call_m(int offset, RegisterID base)
1183 m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_CALLN, base, offset);
1201 void jmp_m(int offset, RegisterID base)
1203 m_formatter.oneByteOp(OP_GROUP5_Ev, GROUP5_OP_JMPN, base, offset);
1308 void addsd_mr(int offset, RegisterID base, XMMRegisterID dst)
1311 m_formatter.twoByteOp(OP2_ADDSD_VsdWsd, (RegisterID)dst, base, offset);
1320 void cvtsi2sd_mr(int offset, RegisterID base, XMMRegisterID dst)
1323 m_formatter.twoByteOp(OP2_CVTSI2SD_VsdEd, (RegisterID)dst, base, offset);
1360 void movsd_rm(XMMRegisterID src, int offset, RegisterID base)
1363 m_formatter.twoByteOp(OP2_MOVSD_WsdVsd, (RegisterID)src, base, offset);
1366 void movsd_mr(int offset, RegisterID base, XMMRegisterID dst)
1369 m_formatter.twoByteOp(OP2_MOVSD_VsdWsd, (RegisterID)dst, base, offset);
1386 void mulsd_mr(int offset, RegisterID base, XMMRegisterID dst)
1389 m_formatter.twoByteOp(OP2_MULSD_VsdWsd, (RegisterID)dst, base, offset);
1405 void subsd_mr(int offset, RegisterID base, XMMRegisterID dst)
1408 m_formatter.twoByteOp(OP2_SUBSD_VsdWsd, (RegisterID)dst, base, offset);
1417 void ucomisd_mr(int offset, RegisterID base, XMMRegisterID dst)
1420 m_formatter.twoByteOp(OP2_UCOMISD_VsdWsd, (RegisterID)dst, base, offset);
1429 void divsd_mr(int offset, RegisterID base, XMMRegisterID dst)
1432 m_formatter.twoByteOp(OP2_DIVSD_VsdWsd, (RegisterID)dst, base, offset);
1630 // * Five argument ModRM - a register, and a base register, an index, scale, and offset describing a memory operand.
1658 void oneByteOp(OneByteOpcodeID opcode, int reg, RegisterID base, int offset)
1661 emitRexIfNeeded(reg, 0, base);
1663 memoryModRM(reg, base, offset);
1666 void oneByteOp_disp32(OneByteOpcodeID opcode, int reg, RegisterID base, int offset)
1669 emitRexIfNeeded(reg, 0, base);
1671 memoryModRM_disp32(reg, base, offset);
1674 void oneByteOp(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
1677 emitRexIfNeeded(reg, index, base);
1679 memoryModRM(reg, base, index, scale, offset);
1707 void twoByteOp(TwoByteOpcodeID opcode, int reg, RegisterID base, int offset)
1710 emitRexIfNeeded(reg, 0, base);
1713 base, offset);
1716 void twoByteOp(TwoByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
1719 emitRexIfNeeded(reg, index, base);
1722 memoryModRM(reg, base, index, scale, offset);
1764 void oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID base, int offset)
1767 emitRexW(reg, 0, base);
1769 memoryModRM(reg, base, offset);
1772 void oneByteOp64_disp32(OneByteOpcodeID opcode, int reg, RegisterID base, int offset)
1775 emitRexW(reg, 0, base);
1777 memoryModRM_disp32(reg, base, offset);
1780 void oneByteOp64(OneByteOpcodeID opcode, int reg, RegisterID base, RegisterID index, int scale, int offset)
1783 emitRexW(reg, index, base);
1785 memoryModRM(reg, base, index, scale, offset);
1923 // regRequiresRex() to check other registers (i.e. address base & index).
1954 void putModRmSib(ModRmMode mode, int reg, RegisterID base, RegisterID index, int scale)
1959 m_buffer.putByteUnchecked((scale << 6) | ((index & 7) << 3) | (base & 7));
1967 void memoryModRM(int reg, RegisterID base, int offset)
1969 // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
1971 if ((base == hasSib) || (base == hasSib2)) {
1973 if (base == hasSib) {
1975 if (!offset) // No need to check if the base is noBase, since we know it is hasSib!
1976 putModRmSib(ModRmMemoryNoDisp, reg, base, noIndex, 0);
1978 putModRmSib(ModRmMemoryDisp8, reg, base, noIndex, 0);
1981 putModRmSib(ModRmMemoryDisp32, reg, base, noIndex, 0);
1986 if (!offset && (base != noBase) && (base != noBase2))
1988 if (!offset && (base != noBase))
1990 putModRm(ModRmMemoryNoDisp, reg, base);
1992 putModRm(ModRmMemoryDisp8, reg, base);
1995 putModRm(ModRmMemoryDisp32, reg, base);
2001 void memoryModRM_disp32(int reg, RegisterID base, int offset)
2003 // A base of esp or r12 would be interpreted as a sib, so force a sib with no index & put the base in there.
2005 if ((base == hasSib) || (base == hasSib2)) {
2007 if (base == hasSib) {
2009 putModRmSib(ModRmMemoryDisp32, reg, base, noIndex, 0);
2012 putModRm(ModRmMemoryDisp32, reg, base);
2017 void memoryModRM(int reg, RegisterID base, RegisterID index, int scale, int offset)
2022 if (!offset && (base != noBase) && (base != noBase2))
2024 if (!offset && (base != noBase))
2026 putModRmSib(ModRmMemoryNoDisp, reg, base, index, scale);
2028 putModRmSib(ModRmMemoryDisp8, reg, base, index, scale);
2031 putModRmSib(ModRmMemoryDisp32, reg, base, index, scale);
