Lines Matching refs:Imm32
58 Jump srcNotInt = branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag));
59 addSlowCase(branch32(Equal, regT0, Imm32(0)));
67 addSlowCase(branch32(Above, regT1, Imm32(JSValue::LowestTag)));
69 xor32(Imm32(1 << 31), regT1);
101 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
102 addJump(branch32(LessThanOrEqual, regT2, Imm32(getConstantOperand(op1).asInt32())), target);
105 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
106 addJump(branch32(GreaterThanOrEqual, regT0, Imm32(getConstantOperand(op2).asInt32())), target);
109 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
110 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
164 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
165 addJump(branch32(GreaterThan, regT2, Imm32(getConstantOperand(op1).asInt32())), target);
168 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
169 addJump(branch32(LessThan, regT0, Imm32(getConstantOperand(op2).asInt32())), target);
172 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
173 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
227 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
228 addJump(branch32(LessThan, regT2, Imm32(getConstantOperand(op1).asInt32())), target);
231 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
232 addJump(branch32(GreaterThan, regT0, Imm32(getConstantOperand(op2).asInt32())), target);
235 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
236 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
288 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
289 lshift32(Imm32(getConstantOperand(op2).asInt32()), regT0);
296 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
297 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
328 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
329 rshift32(Imm32(getConstantOperand(op2).asInt32()), regT0);
336 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
337 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
370 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
371 and32(Imm32(constant), regT0);
377 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
378 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
411 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
412 or32(Imm32(constant), regT0);
418 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
419 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
452 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
453 xor32(Imm32(constant), regT0);
459 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
460 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
489 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
514 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
521 addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
536 stubCall.addArgument(Imm32(srcDst));
548 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
555 addSlowCase(branchSub32(Overflow, Imm32(1), regT0));
570 stubCall.addArgument(Imm32(srcDst));
582 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
583 addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
607 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
608 addSlowCase(branchSub32(Overflow, Imm32(1), regT0));
652 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
653 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
675 Jump notInt32 = branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag));
676 addSlowCase(branchAdd32(Overflow, Imm32(constant), regT0));
688 addSlowCase(branch32(Above, regT1, Imm32(JSValue::LowestTag)));
689 move(Imm32(constant), regT2);
761 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
762 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
784 Jump notInt32 = branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag));
785 addSlowCase(branchSub32(Overflow, Imm32(constant), regT0));
797 addSlowCase(branch32(Above, regT1, Imm32(JSValue::LowestTag)));
798 move(Imm32(constant), regT2);
854 addSlowCase(branch32(Above, regT1, Imm32(JSValue::LowestTag)));
859 Jump doubleOp2 = branch32(Below, regT3, Imm32(JSValue::LowestTag));
862 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
927 addSlowCase(branch32(Above, regT3, Imm32(JSValue::LowestTag)));
984 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
985 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
1016 emitStoreInt32(dst, Imm32(0), (op1 == dst || op2 == dst));
1067 notInt32Op1.append(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
1068 notInt32Op2.append(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
1130 move(Imm32(getConstantOperand(op2).asInt32()), X86Registers::ecx);
1131 addSlowCase(branch32(NotEqual, X86Registers::edx, Imm32(JSValue::Int32Tag)));
1133 addSlowCase(branch32(Equal, X86Registers::eax, Imm32(0x80000000))); // -2147483648 / -1 => EXC_ARITHMETIC
1136 addSlowCase(branch32(NotEqual, X86Registers::edx, Imm32(JSValue::Int32Tag)));
1137 addSlowCase(branch32(NotEqual, X86Registers::ebx, Imm32(JSValue::Int32Tag)));
1139 addSlowCase(branch32(Equal, X86Registers::eax, Imm32(0x80000000))); // -2147483648 / -1 => EXC_ARITHMETIC
1140 addSlowCase(branch32(Equal, X86Registers::ecx, Imm32(0))); // divide by 0
1149 Jump storeResult2 = branchTest32(Zero, X86Registers::ebx, Imm32(0x80000000)); // not negative
1192 addSlowCase(branch32(NotEqual, regT1, Imm32(JSValue::Int32Tag)));
1193 addSlowCase(branch32(NotEqual, regT3, Imm32(JSValue::Int32Tag)));
1195 addSlowCase(branch32(Equal, regT2, Imm32(0)));
1290 rshift32(Imm32(getConstantOperandImmediateInt(op2) & 0x1f), regT0);
1325 orPtr(Imm32(JSImmediate::TagTypeNumber), regT0);
1390 addJump(branch32(GreaterThanOrEqual, regT0, Imm32(op2imm)), target);
1399 addJump(branch32(LessThanOrEqual, regT1, Imm32(op1imm)), target);
1439 move(Imm32(op2imm), regT1);
1480 move(Imm32(op1imm), regT0);
1575 addJump(branch32(LessThan, regT0, Imm32(op2imm)), target);
1584 addJump(branch32(GreaterThan, regT1, Imm32(op1imm)), target);
1624 move(Imm32(op2imm), regT1);
1665 move(Imm32(op1imm), regT0);
1760 addJump(branch32(GreaterThan, regT0, Imm32(op2imm)), target);
1769 addJump(branch32(LessThan, regT1, Imm32(op1imm)), target);
1809 move(Imm32(op2imm), regT1);
1850 move(Imm32(op1imm), regT0);
1937 andPtr(Imm32(imm), regT0);
1941 andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op1)))), regT0);
1948 andPtr(Imm32(imm), regT0);
1952 andPtr(Imm32(static_cast<int32_t>(JSImmediate::rawValue(getConstantOperand(op2)))), regT0);
1996 addSlowCase(branchAdd32(Overflow, Imm32(1), regT1));
1999 addSlowCase(branchAdd32(Overflow, Imm32(1 << JSImmediate::IntegerPayloadShift), regT1));
2015 stubCall.addArgument(Imm32(srcDst));
2028 addSlowCase(branchSub32(Zero, Imm32(1), regT1));
2031 addSlowCase(branchSub32(Zero, Imm32(1 << JSImmediate::IntegerPayloadShift), regT1));
2047 stubCall.addArgument(Imm32(srcDst));
2058 addSlowCase(branchAdd32(Overflow, Imm32(1), regT0));
2061 addSlowCase(branchAdd32(Overflow, Imm32(1 << JSImmediate::IntegerPayloadShift), regT0));
2087 addSlowCase(branchSub32(Zero, Imm32(1), regT0));
2090 addSlowCase(branchSub32(Zero, Imm32(1 << JSImmediate::IntegerPayloadShift), regT0));
2173 addSlowCase(branch32(Equal, regT2, Imm32(1)));
2336 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1)), regT0));
2341 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op2)), regT0));
2376 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2381 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2695 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), regT0));
2701 addSlowCase(branchAdd32(Overflow, Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), regT0));
2722 sub32(Imm32(getConstantOperandImmediateInt(op1) << JSImmediate::IntegerPayloadShift), regT0);
2731 sub32(Imm32(getConstantOperandImmediateInt(op2) << JSImmediate::IntegerPayloadShift), regT0);
2756 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
2764 addSlowCase(branchMul32(Overflow, Imm32(value), regT0, regT0));
