1 /* 2 * Misc utility routines for accessing the SOC Interconnects 3 * of Broadcom HNBU chips. 4 * 5 * Copyright (C) 1999-2010, Broadcom Corporation 6 * 7 * Unless you and Broadcom execute a separate written software license 8 * agreement governing use of this software, this software is licensed to you 9 * under the terms of the GNU General Public License version 2 (the "GPL"), 10 * available at http://www.broadcom.com/licenses/GPLv2.php, with the 11 * following added to such license: 12 * 13 * As a special exception, the copyright holders of this software give you 14 * permission to link this software with independent modules, and to copy and 15 * distribute the resulting executable under terms of your choice, provided that 16 * you also meet, for each linked independent module, the terms and conditions of 17 * the license of that module. An independent module is a module which is not 18 * derived from this software. The special exception does not apply to any 19 * modifications of the software. 20 * 21 * Notwithstanding the above, under no circumstances may you combine this 22 * software in any way with any other Broadcom software provided under a license 23 * other than the GPL, without Broadcom's express prior written consent. 24 * 25 * $Id: siutils.h,v 13.197.4.2.4.3.8.16 2010/06/23 21:36:05 Exp $ 26 */ 27 28 29 #ifndef _siutils_h_ 30 #define _siutils_h_ 31 32 33 struct si_pub { 34 uint socitype; 35 36 uint bustype; 37 uint buscoretype; 38 uint buscorerev; 39 uint buscoreidx; 40 int ccrev; 41 uint32 cccaps; 42 int pmurev; 43 uint32 pmucaps; 44 uint boardtype; 45 uint boardvendor; 46 uint boardflags; 47 uint chip; 48 uint chiprev; 49 uint chippkg; 50 uint32 chipst; 51 bool issim; 52 uint socirev; 53 bool pci_pr32414; 54 }; 55 56 #if defined(WLC_HIGH) && !defined(WLC_LOW) 57 typedef struct si_pub si_t; 58 #else 59 typedef const struct si_pub si_t; 60 #endif 61 62 63 #define SI_OSH NULL 64 65 66 #define XTAL 0x1 67 #define PLL 0x2 68 69 70 #define CLK_FAST 0 71 #define CLK_DYNAMIC 2 72 73 74 #define GPIO_DRV_PRIORITY 0 75 #define GPIO_APP_PRIORITY 1 76 #define GPIO_HI_PRIORITY 2 77 78 79 #define GPIO_PULLUP 0 80 #define GPIO_PULLDN 1 81 82 83 #define GPIO_REGEVT 0 84 #define GPIO_REGEVT_INTMSK 1 85 #define GPIO_REGEVT_INTPOL 2 86 87 88 #define SI_DEVPATH_BUFSZ 16 89 90 91 #define SI_DOATTACH 1 92 #define SI_PCIDOWN 2 93 #define SI_PCIUP 3 94 95 #define ISSIM_ENAB(sih) 0 96 97 98 #if defined(BCMPMUCTL) 99 #define PMUCTL_ENAB(sih) (BCMPMUCTL) 100 #else 101 #define PMUCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PMU) 102 #endif 103 104 105 #if defined(BCMPMUCTL) && BCMPMUCTL 106 #define CCCTL_ENAB(sih) (0) 107 #define CCPLL_ENAB(sih) (0) 108 #else 109 #define CCCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PWR_CTL) 110 #define CCPLL_ENAB(sih) ((sih)->cccaps & CC_CAP_PLL_MASK) 111 #endif 112 113 typedef void (*gpio_handler_t)(uint32 stat, void *arg); 114 115 116 117 extern si_t *si_attach(uint pcidev, osl_t *osh, void *regs, uint bustype, 118 void *sdh, char **vars, uint *varsz); 119 extern si_t *si_kattach(osl_t *osh); 120 extern void si_detach(si_t *sih); 121 extern bool si_pci_war16165(si_t *sih); 122 123 extern uint si_corelist(si_t *sih, uint coreid[]); 124 extern uint si_coreid(si_t *sih); 125 extern uint si_flag(si_t *sih); 126 extern uint si_intflag(si_t *sih); 127 extern uint si_coreidx(si_t *sih); 128 extern uint si_coreunit(si_t *sih); 129 extern uint si_corevendor(si_t *sih); 130 extern uint si_corerev(si_t *sih); 131 extern void *si_osh(si_t *sih); 132 extern void si_setosh(si_t *sih, osl_t *osh); 133 extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val); 134 extern void *si_coreregs(si_t *sih); 135 extern void si_write_wrapperreg(si_t *sih, uint32 offset, uint32 val); 136 extern uint32 si_core_cflags(si_t *sih, uint32 mask, uint32 val); 137 extern void si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val); 138 extern uint32 si_core_sflags(si_t *sih, uint32 mask, uint32 val); 139 extern bool si_iscoreup(si_t *sih); 140 extern uint si_findcoreidx(si_t *sih, uint coreid, uint coreunit); 141 extern void *si_setcoreidx(si_t *sih, uint coreidx); 142 extern void *si_setcore(si_t *sih, uint coreid, uint coreunit); 143 extern void *si_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val); 144 extern void si_restore_core(si_t *sih, uint coreid, uint intr_val); 145 extern int si_numaddrspaces(si_t *sih); 146 extern uint32 si_addrspace(si_t *sih, uint asidx); 147 extern uint32 si_addrspacesize(si_t *sih, uint asidx); 148 extern int si_corebist(si_t *sih); 149 extern void si_core_reset(si_t *sih, uint32 bits, uint32 resetbits); 150 extern void si_core_tofixup(si_t *sih); 151 extern void si_core_disable(si_t *sih, uint32 bits); 152 extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m); 153 extern uint32 si_clock(si_t *sih); 154 extern void si_clock_pmu_spuravoid(si_t *sih, bool spuravoid); 155 extern uint32 si_alp_clock(si_t *sih); 156 extern uint32 si_ilp_clock(si_t *sih); 157 extern void si_pci_setup(si_t *sih, uint coremask); 158 extern void si_pcmcia_init(si_t *sih); 159 extern void si_setint(si_t *sih, int siflag); 160 extern bool si_backplane64(si_t *sih); 161 extern void si_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, 162 void *intrsenabled_fn, void *intr_arg); 163 extern void si_deregister_intr_callback(si_t *sih); 164 extern void si_clkctl_init(si_t *sih); 165 extern uint16 si_clkctl_fast_pwrup_delay(si_t *sih); 166 extern bool si_clkctl_cc(si_t *sih, uint mode); 167 extern int si_clkctl_xtal(si_t *sih, uint what, bool on); 168 extern uint32 si_gpiotimerval(si_t *sih, uint32 mask, uint32 val); 169 extern bool si_backplane64(si_t *sih); 170 extern void si_btcgpiowar(si_t *sih); 171 extern bool si_deviceremoved(si_t *sih); 172 extern uint32 si_socram_size(si_t *sih); 173 174 extern void si_watchdog(si_t *sih, uint ticks); 175 extern void si_watchdog_ms(si_t *sih, uint32 ms); 176 extern void *si_gpiosetcore(si_t *sih); 177 extern uint32 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val, uint8 priority); 178 extern uint32 si_gpioouten(si_t *sih, uint32 mask, uint32 val, uint8 priority); 179 extern uint32 si_gpioout(si_t *sih, uint32 mask, uint32 val, uint8 priority); 180 extern uint32 si_gpioin(si_t *sih); 181 extern uint32 si_gpiointpolarity(si_t *sih, uint32 mask, uint32 val, uint8 priority); 182 extern uint32 si_gpiointmask(si_t *sih, uint32 mask, uint32 val, uint8 priority); 183 extern uint32 si_gpioled(si_t *sih, uint32 mask, uint32 val); 184 extern uint32 si_gpioreserve(si_t *sih, uint32 gpio_num, uint8 priority); 185 extern uint32 si_gpiorelease(si_t *sih, uint32 gpio_num, uint8 priority); 186 extern uint32 si_gpiopull(si_t *sih, bool updown, uint32 mask, uint32 val); 187 extern uint32 si_gpioevent(si_t *sih, uint regtype, uint32 mask, uint32 val); 188 extern uint32 si_gpio_int_enable(si_t *sih, bool enable); 189 190 191 extern void *si_gpio_handler_register(si_t *sih, uint32 e, bool lev, gpio_handler_t cb, void *arg); 192 extern void si_gpio_handler_unregister(si_t *sih, void* gpioh); 193 extern void si_gpio_handler_process(si_t *sih); 194 195 196 extern bool si_pci_pmecap(si_t *sih); 197 struct osl_info; 198 extern bool si_pci_fastpmecap(struct osl_info *osh); 199 extern bool si_pci_pmeclr(si_t *sih); 200 extern void si_pci_pmeen(si_t *sih); 201 extern uint si_pcie_readreg(void *sih, uint addrtype, uint offset); 202 203 extern void si_sdio_init(si_t *sih); 204 205 extern uint16 si_d11_devid(si_t *sih); 206 extern int si_corepciid(si_t *sih, uint func, uint16 *pcivendor, uint16 *pcidevice, 207 uint8 *pciclass, uint8 *pcisubclass, uint8 *pciprogif, uint8 *pciheader); 208 209 #define si_eci_init(sih) (0) 210 #define si_eci_notify_bt(sih, type, val, interrupt) (0) 211 212 213 214 extern int si_devpath(si_t *sih, char *path, int size); 215 216 extern char *si_getdevpathvar(si_t *sih, const char *name); 217 extern int si_getdevpathintvar(si_t *sih, const char *name); 218 219 220 extern uint8 si_pcieclkreq(si_t *sih, uint32 mask, uint32 val); 221 extern void si_war42780_clkreq(si_t *sih, bool clkreq); 222 extern void si_pci_sleep(si_t *sih); 223 extern void si_pci_down(si_t *sih); 224 extern void si_pci_up(si_t *sih); 225 extern void si_pcie_war_ovr_disable(si_t *sih); 226 extern void si_pcie_extendL1timer(si_t *sih, bool extend); 227 extern int si_pci_fixcfg(si_t *sih); 228 229 230 231 232 233 234 235 #endif 236
