| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_STRING_COMPARETO.S | 70 ldrh r3, [r2, #2]!
71 ldrh r4, [r1, #2]!
72 ldrh r7, [r2, #2]!
73 ldrh r8, [r1, #2]!
83 ldrh r3, [r2, #2]!
84 ldrh r4, [r1, #2]!
85 ldrh r7, [r2, #2]!
86 ldrh r8, [r1, #2]!
87 ldrh r9, [r2, #2]!
88 ldrh r12,[r1, #2]
[all...] |
| TEMPLATE_STRING_INDEXOF.S | 64 ldrh r3, [r0, #2]!
65 ldrh r4, [r0, #2]!
66 ldrh r10, [r0, #2]!
67 ldrh r11, [r0, #2]!
84 ldrh r3, [r0, #2]!
|
| TEMPLATE_INVOKE_METHOD_CHAIN.S | 9 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
10 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
|
| TEMPLATE_INVOKE_METHOD_NO_OPT.S | 7 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
8 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
|
| TEMPLATE_INVOKE_METHOD_NATIVE.S | 2 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
|
| /dalvik/vm/mterp/armv5te/ |
| header.S | 106 #define FETCH_INST() ldrh rINST, [rPC]
120 #define FETCH_ADVANCE_INST(_count) ldrh rINST, [rPC, #(_count*2)]!
127 ldrh _dreg, [_sreg, #(_count*2)]!
134 * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
139 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]!
147 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)]
|
| OP_INVOKE_VIRTUAL.S | 39 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
|
| OP_INVOKE_SUPER.S | 37 ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
|
| footer.S | 551 ldrh r9, [r0, #offMethod_registersSize] @ r9<- methodToCall->regsSize
556 ldrh r3, [r0, #offMethod_outsSize] @ r3<- methodToCall->outsSize
571 ldrh r9, [r0, #offMethod_registersSize] @ r9<- methodToCall->regsSize
572 ldrh r3, [r0, #offMethod_outsSize] @ r3<- methodToCall->outsSize
646 ldrh r9, [r2] @ r9 <- load INST from new PC
[all...] |
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-armv5te-vfp.S | 235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
236 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
298 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
397 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
[all...] |
| CompilerTemplateAsm-armv7-a-neon.S | 235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
236 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
298 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
397 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
[all...] |
| CompilerTemplateAsm-armv7-a.S | 235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
236 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
298 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
397 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
[all...] |
| CompilerTemplateAsm-armv5te.S | 235 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
236 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
297 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
298 ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
397 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| memcmp16.S | 74 1: ldrh r0, [r3], #2
75 ldrh ip, [r1], #2
91 ldrh r0, [r3], #2
92 ldrh ip, [r1], #2
173 ldrh r0, [r3, #-4]
174 ldrh ip, [r1, #-4]
184 8: ldrh r0, [r3], #2
185 ldrh ip, [r1], #2
|
| /system/core/libpixelflinger/ |
| col32cb16blend.S | 56 ldrh r8, [r0] // load dest pixel
|
| col32cb16blend_neon.S | 130 ldrh r8, [r0] // load dest pixel
|
| t32cb16blend.S | 154 ldrh r3, [r0]
|
| /external/libvpx/vp8/common/arm/armv6/ |
| simpleloopfilter_v6.asm | 156 ldrh r3, [src, #-2]
157 ldrh r4, [src], pstep
160 ldrh r5, [src, #-2]
161 ldrh r6, [src], pstep
166 ldrh r3, [src, #-2]
167 ldrh r4, [src], pstep
172 ldrh r5, [src, #-2]
173 ldrh r6, [src], pstep
|
| loopfilter_v6.asm | 696 ldrh r7, [src, #-2]
697 ldrh r8, [src], pstep
704 ldrh r9, [src, #-2]
705 ldrh r10, [src], pstep
709 ldrh r7, [src, #-2]
710 ldrh r8, [src], pstep
714 ldrh r9, [src, #-2]
715 ldrh r10, [src], pstep
[all...] |
| sixtappredict8x4_v6.asm | 156 ldrh r9, [sp, #12]
|
| /external/skia/src/core/asm/ |
| s32a_d565_opaque.S | 53 ldrh r3, [r0] // r3 = *dst
|
| /external/v8/src/arm/ |
| regexp-macro-assembler-arm.cc | 251 __ ldrh(r1, MemOperand(r0, char_size(), PostIndex));
405 __ ldrh(r3, MemOperand(r0, char_size(), PostIndex));
406 __ ldrh(r4, MemOperand(r2, char_size(), PostIndex));
[all...] |
| /external/webkit/JavaScriptCore/assembler/ |
| MacroAssemblerARMv7.h | 360 m_assembler.ldrh(dest, address.base, address.u.index, address.u.scale);
364 m_assembler.ldrh(dest, address.base, armImm);
367 m_assembler.ldrh(dest, address.base, address.u.offset, true, false);
424 m_assembler.ldrh(dest, makeBaseIndexBase(address), address.index, address.scale);
[all...] |
| ARMv7Assembler.h | 1026 void ldrh(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) function in class:JSC::ARMv7Assembler
1048 void ldrh(RegisterID rt, RegisterID rn, int offset, bool index, bool wback) function in class:JSC::ARMv7Assembler
1070 void ldrh(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0) function in class:JSC::ARMv7Assembler
[all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-armv4t.S | 113 #define FETCH_INST() ldrh rINST, [rPC]
127 #define FETCH_ADVANCE_INST(_count) ldrh rINST, [rPC, #(_count*2)]!
134 ldrh _dreg, [_sreg, #(_count*2)]!
141 * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
146 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]!
154 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)]
[all...] |
