/external/libvpx/vp8/common/ppc/ |
platform_altivec.asm | 25 ;# r3 context_ptr 28 W v20, r3 29 W v21, r3 30 W v22, r3 31 W v23, r3 32 W v24, r3 33 W v25, r3 34 W v26, r3 35 W v27, r3 36 W v28, r3 [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_NEW_INSTANCE.S | 13 ldr r3, [rGLUE, #offGlue_methodClassDex] @ r3<- pDvmDex 15 ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses 16 ldr r0, [r3, r1, lsl #2] @ r0<- resolved class 32 mov r3, rINST, lsr #8 @ r3<- AA 37 SET_VREG(r0, r3) @ vAA<- r0 59 ldr r3, [rGLUE, #offGlue_method] @ r3<- glue->metho [all...] |
OP_IGET_QUICK.S | 6 GET_VREG(r3, r2) @ r3<- object we're operating on 8 cmp r3, #0 @ check object for null 11 ldr r0, [r3, r1] @ r0<- obj.field (always 32 bits)
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OP_IGET_WIDE_QUICK.S | 5 GET_VREG(r3, r2) @ r3<- object we're operating on 7 cmp r3, #0 @ check object for null 10 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned) 13 add r3, rFP, r2, lsl #2 @ r3<- &fp[A] 15 stmia r3, {r0-r1} @ fp[A]<- r0/r1
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OP_INVOKE_STATIC.S | 11 ldr r3, [rGLUE, #offGlue_methodClassDex] @ r3<- pDvmDex 13 ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods 14 ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall 18 0: ldr r3, [rGLUE, #offGlue_method] @ r3<- glue->method 19 ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
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binopWide.S | 4 * specifies an instruction that performs "result = r0-r1 op r2-r3". 21 mov r3, r0, lsr #8 @ r3<- CC 24 add r3, rFP, r3, lsl #2 @ r3<- &fp[CC] 26 ldmia r3, {r2-r3} @ r2/r3<- vCC/vCC+1 28 orrs ip, r2, r3 @ second arg (r2-r3) is zero [all...] |
OP_CONST_WIDE_16.S | 4 mov r3, rINST, lsr #8 @ r3<- AA 7 add r3, rFP, r3, lsl #2 @ r3<- &fp[AA] 9 stmia r3, {r0-r1} @ vAA<- r0/r1
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OP_CONST_WIDE_32.S | 4 mov r3, rINST, lsr #8 @ r3<- AA 8 add r3, rFP, r3, lsl #2 @ r3<- &fp[AA] 11 stmia r3, {r0-r1} @ vAA<- r0/r1
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OP_CONST_WIDE_HIGH16.S | 4 mov r3, rINST, lsr #8 @ r3<- AA 8 add r3, rFP, r3, lsl #2 @ r3<- &fp[AA] 10 stmia r3, {r0-r1} @ vAA<- r0/r1
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OP_MOVE_WIDE_16.S | 4 FETCH(r3, 2) @ r3<- BBBB 6 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 8 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
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OP_MOVE_WIDE_FROM16.S | 4 FETCH(r3, 1) @ r3<- BBBB 6 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 8 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB]
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OP_INVOKE_VIRTUAL.S | 12 ldr r3, [rGLUE, #offGlue_methodClassDex] @ r3<- pDvmDex 14 ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods 16 ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod 23 ldr r3, [rGLUE, #offGlue_method] @ r3<- glue->method 24 ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz 42 ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->claz [all...] |
/dalvik/vm/mterp/armv4t/ |
OP_IGET_WIDE_QUICK.S | 5 GET_VREG(r3, r2) @ r3<- object we're operating on 7 cmp r3, #0 @ check object for null 10 add r9, r3, r1 @ r9<- object + offset 14 add r3, rFP, r2, lsl #2 @ r3<- &fp[A] 16 stmia r3, {r0-r1} @ fp[A]<- r0/r1
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/external/openssl/crypto/sha/asm/ |
sha256-armv4.s | 28 sub r3,pc,#8 @ sha256_block_data_order 32 sub r14,r3,#256 @ K256 35 ldrb r3,[r1,#3] @ 0 39 orr r3,r3,r12,lsl#8 40 orr r3,r3,r2,lsl#16 41 orr r3,r3,r0,lsl#24 44 str r3,[sp,#0*4 [all...] |
/dalvik/vm/mterp/armv6t2/ |
unopNarrower.S | 13 mov r3, rINST, lsr #12 @ r3<- B 15 add r3, rFP, r3, lsl #2 @ r3<- &fp[B] 16 ldmia r3, {r0-r1} @ r0/r1<- vB/vB+1 19 $instr @ r0<- op, r0-r3 changed
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OP_IGET_QUICK.S | 7 GET_VREG(r3, r2) @ r3<- object we're operating on 9 cmp r3, #0 @ check object for null 11 ldr r0, [r3, r1] @ r0<- obj.field (always 32 bits)
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OP_IGET_WIDE_QUICK.S | 6 GET_VREG(r3, r2) @ r3<- object we're operating on 8 cmp r3, #0 @ check object for null 10 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned) 12 add r3, rFP, r2, lsl #2 @ r3<- &fp[A] 14 stmia r3, {r0-r1} @ fp[A]<- r0/r1
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OP_MOVE_WIDE.S | 4 mov r3, rINST, lsr #12 @ r3<- B 6 add r3, rFP, r3, lsl #2 @ r3<- &fp[B] 8 ldmia r3, {r0-r1} @ r0/r1<- fp[B]
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/external/skia/src/core/asm/ |
s32a_d565_opaque.S | 43 andeq r3, r6, #63488 // 0xf800 45 orreq r3, r3, r2 46 orreq r3, r3, r6, lsr #27 47 streqh r3, [r0], #2 // *dst = r3; dst++ 50 mov r3, r1, lsl #16 52 mov r5, r3, lsr #24 53 ldrh r3, [r0] // r3 = *ds [all...] |
/frameworks/base/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
pred_lt4_1_opt.s | 30 @ r3 --- L_subfr
61 LDR r3, [r2], #4 @h[0], h[1]
66 SMULBB r10, r4, r3 @x[0] * h[0]
67 SMULBB r11, r6, r3 @x[1] * h[0]
68 SMULBB r12, r9, r3 @x[2] * h[0]
71 SMLABT r10, r6, r3, r10 @x[1] * h[1]
72 SMLABT r11, r9, r3, r11 @x[2] * h[1]
73 SMLABT r12, r4, r3, r12 @x[3] * h[1]
75 LDR r3, [r2], #4 @h[2], h[3]
77 SMLABB r10, r9, r3, r10 @x[2] * h[2] [all...] |
/dalvik/vm/mterp/arm-vfp/ |
fbinop2addr.S | 9 mov r3, rINST, lsr #12 @ r3<- B 11 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB 13 flds s1, [r3] @ s1<- vB
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fbinopWide2addr.S | 10 mov r3, rINST, lsr #12 @ r3<- B 12 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB 14 fldd d1, [r3] @ d1<- vB
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funop.S | 8 mov r3, rINST, lsr #12 @ r3<- B 10 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB 11 flds s0, [r3] @ s0<- vB
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funopNarrower.S | 8 mov r3, rINST, lsr #12 @ r3<- B 10 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB 11 fldd d0, [r3] @ d0<- vB
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funopWider.S | 8 mov r3, rINST, lsr #12 @ r3<- B 10 VREG_INDEX_TO_ADDR(r3, r3) @ r3<- &vB 11 flds s0, [r3] @ s0<- vB
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