| /external/srec/srec/cfront/ |
| himul32.h | 51 mulhw r3, factor1, factor2 # place the high order 32 bits of the product in the return register r3 local
|
| /frameworks/base/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Dot_p_opt.s | 27 @ *exp --- r3
72 STRH r11, [r3]
|
| cor_h_vec_opt.s | 28 @r3 ---- sign[]
45 @r3 --- sign[], r4 --- i, r7 --- p0
71 ADD r9, r3, r2, LSL #1 @address of sign[pos]
118 ADD r9, r3, r2, LSL #1 @address of sign[pos]
|
| /bionic/libc/arch-arm/bionic/ |
| memcmp.S | 79 rsb r3, r4, #0
80 ands r3, r3, #3
84 sub r2, r2, r3
89 subs r3, r3, #1
|
| setjmp.S | 89 ldr r3, [r0, #(_JB_MAGIC * 4)]
90 teq r2, r3
|
| clone.S | 39 str r3, [r1, #-8]
|
| crtbegin_dynamic.S | 57 adr r3, 1f
|
| crtbegin_static.S | 57 adr r3, 1f
|
| /external/libvpx/vp8/encoder/arm/neon/ |
| variance_neon.asm | 26 ; r3 int recon_stride
37 vld1.8 {q2}, [r2], r3
39 vld1.8 {q3}, [r2], r3
110 vld1.8 {q2}, [r2], r3
112 vld1.8 {q3}, [r2], r3
173 vld1.8 {d4}, [r2], r3
175 vld1.8 {d6}, [r2], r3
215 ; r3 int recon_stride
226 vld1.8 {d4}, [r2], r3
228 vld1.8 {d5}, [r2], r3
[all...] |
| vp8_memcpy_neon.asm | 55 ands r3, r2, #0xff ;extra copy
60 subs r3, r3, #16
|
| /external/libvpx/vp8/decoder/arm/neon/ |
| dequant_dc_idct_neon.asm | 24 ; r3 unsigned char *dest
122 vst1.32 {d0[0]}, [r3], r1
123 vst1.32 {d0[1]}, [r3], r1
124 vst1.32 {d1[0]}, [r3], r1
125 vst1.32 {d1[1]}, [r3]
|
| dequant_idct_neon.asm | 23 ; r3 unsigned char *dest
116 vst1.32 {d0[0]}, [r3], r1
117 vst1.32 {d0[1]}, [r3], r1
118 vst1.32 {d1[0]}, [r3], r1
119 vst1.32 {d1[1]}, [r3]
|
| /external/bouncycastle/src/main/java/org/bouncycastle/crypto/engines/ |
| AESEngine.java | 477 int r, r0, r1, r2, r3; local
491 r3 = T0[C3&255] ^ shift(T0[(C0>>8)&255], 24) ^ shift(T0[(C1>>16)&255], 16) ^ shift(T0[(C2>>24)&255], 8) ^ KW[r++][3];
492 C0 = T0[r0&255] ^ shift(T0[(r1>>8)&255], 24) ^ shift(T0[(r2>>16)&255], 16) ^ shift(T0[(r3>>24)&255], 8) ^ KW[r][0];
493 C1 = T0[r1&255] ^ shift(T0[(r2>>8)&255], 24) ^ shift(T0[(r3>>16)&255], 16) ^ shift(T0[(r0>>24)&255], 8) ^ KW[r][1];
494 C2 = T0[r2&255] ^ shift(T0[(r3>>8)&255], 24) ^ shift(T0[(r0>>16)&255], 16) ^ shift(T0[(r1>>24)&255], 8) ^ KW[r][2];
495 C3 = T0[r3&255] ^ shift(T0[(r0>>8)&255], 24) ^ shift(T0[(r1>>16)&255], 16) ^ shift(T0[(r2>>24)&255], 8) ^ KW[r++][3];
501 r3 = T0[C3&255] ^ shift(T0[(C0>>8)&255], 24) ^ shift(T0[(C1>>16)&255], 16) ^ shift(T0[(C2>>24)&255], 8) ^ KW[r++][3];
505 C0 = (S[r0&255]&255) ^ ((S[(r1>>8)&255]&255)<<8) ^ ((S[(r2>>16)&255]&255)<<16) ^ (S[(r3>>24)&255]<<24) ^ KW[r][0];
506 C1 = (S[r1&255]&255) ^ ((S[(r2>>8)&255]&255)<<8) ^ ((S[(r3>>16)&255]&255)<<16) ^ (S[(r0>>24)&255]<<24) ^ KW[r][1];
507 C2 = (S[r2&255]&255) ^ ((S[(r3>>8)&255]&255)<<8) ^ ((S[(r0>>16)&255]&255)<<16) ^ (S[(r1>>24)&255]<<24) ^ KW[r][2]
514 int r, r0, r1, r2, r3; local
[all...] |
| /external/libvpx/vp8/decoder/arm/armv6/ |
| dequant_dc_idct_v6.asm | 20 ; r3 = dest
35 str r3, [sp]
83 ldr r3, cospi8sqrt2minus1
90 smulwt r9, r3, r6
91 smulwb r7, r3, r6
95 smulwt r11, r3, r12
99 smulwb r9, r3, r12
128 smulwt r1, r3, r6
130 smulwt lr, r3, r8
142 smulwt r1, r3, r
[all...] |
| /external/openssl/crypto/ |
| ia64cpuid.S | 28 mov r3=r2 };;
32 { .mib; cmp.ne p6,p0=r2,r3
54 .save ar.lc,r3
56 mov r3=ar.lc
126 mov ar.lc=r3
|
| /dalvik/vm/mterp/armv5te/ |
| entry.S | 83 ldr r3, [r2, #offShadowSpace_jitExitState] @ jit exit state
84 cmp r3, #kSVSTraceSelect @ hot trace following?
87 cmp r3, #kSVSNoProfile @ don't profile the next instruction?
|
| OP_EXECUTE_INLINE.S | 9 * The first four args are in r0-r3, pointer to return value storage
47 ldr r3, [rFP, ip, lsr #10] @ r3<- vF (shift right 12, left 2)
|
| /frameworks/base/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| syn_filt_neon.s | 27 @ mem[] --- r3
38 MOV r4, r3 @ copy mem[] address
97 VST1.S16 {D0, D1, D2, D3}, [r3]!
|
| Syn_filt_32_neon.s | 31 @ Qnew --- r3
46 ADD r7, r3, #4 @ 4 + Q_new
47 MOV r3, r6, ASR r7 @ a0 = Aq[0] >> (4 + Q_new)
78 MUL r12, r6, r3 @exc[i] * a0
|
| /external/libvpx/vp8/common/arm/neon/ |
| loopfiltersimpleverticaledge_neon.asm | 24 ; r3 const signed char *limit,
33 vld1.s8 {d26[], d27[]}, [r3] ; limit -> q13
116 add r3, r2, r1
118 add r12, r3, r1
123 vst2.8 {d12[2], d13[2]}, [r3]
131 add r3, r2, r1
133 vst2.8 {d14[1], d15[1]}, [r3], r1
134 add r12, r3, r1
135 vst2.8 {d14[2], d15[2]}, [r3]
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Gen.c | 174 * r3 -> self->threadId
206 loadWordDisp(cUnit, r0, offsetof(Thread, threadId), r3); // Get threadId
209 opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
211 newLIR4(cUnit, kThumb2Bfi, r3, r2, 0, LW_LOCK_OWNER_SHIFT - 1);
215 newLIR4(cUnit, kThumb2Strex, r2, r3, r1, offsetof(Object, lock) >> 2);
229 loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset));
235 newLIR3(cUnit, kThumb2StrRRI8Predec, r3, rFP,
267 loadWordDisp(cUnit, r0, offsetof(Thread, threadId), r3); // Get threadId
271 opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
274 opRegReg(cUnit, kOpSub, r2, r3);
[all...] |
| /external/v8/src/arm/ |
| codegen-arm.cc | 232 // Load the offset into r3.
235 __ mov(r3, Operand(slot_offset));
236 __ RecordWrite(r2, r3, r1);
967 __ add(r3, r2, Operand(0x40000000), SetCC);
982 __ and_(r3, r2, Operand(0xc0000000), SetCC)
[all...] |
| /external/openssl/crypto/bn/asm/ |
| pa-risc2.s | 46 ; "callee save" registers: r3-r18
117 ht_1 .reg %r3
132 STD %r3,0(%sp) ; save r3
288 LDD,MB -128(%sp),%r3 ; restore r3
307 STD %r3,0(%sp) ; save r3
447 LDD,MB -128(%sp),%r3 ; restore r3
[all...] |
| /external/qemu/distrib/sdl-1.2.12/src/timer/macos/ |
| FastTimes.c | 311 stw r4,0(r3)
312 stw r5,4(r3)
328 stw r4,0(r3)
329 stw r5,4(r3)
|
| /frameworks/base/media/libstagefright/codecs/aacdec/ |
| fft_rx4_short.cpp | 211 Int32 r3; local
371 r3 = ((r2 - t2) >> exp);
377 *pData4-- = cmplx_mul32_by_16(s3, -r3, exp_jw3) << 1;
378 *pData4 = cmplx_mul32_by_16(r3, s3, exp_jw3) << 1;
|
