Lines Matching full:target
19 '-I%s/lib/Target/Alpha' % root.llvm_src_root,
20 '-I%s/lib/Target/ARM' % root.llvm_src_root,
21 '-I%s/lib/Target/Blackfin' % root.llvm_src_root,
22 '-I%s/lib/Target/CBackend' % root.llvm_src_root,
23 '-I%s/lib/Target/CellSPU' % root.llvm_src_root,
24 '-I%s/lib/Target/CppBackend' % root.llvm_src_root,
25 '-I%s/lib/Target/Mips' % root.llvm_src_root,
26 '-I%s/lib/Target/MSIL' % root.llvm_src_root,
27 '-I%s/lib/Target/MSP430' % root.llvm_src_root,
28 '-I%s/lib/Target/PIC16' % root.llvm_src_root,
29 '-I%s/lib/Target/PowerPC' % root.llvm_src_root,
30 '-I%s/lib/Target/Sparc' % root.llvm_src_root,
31 '-I%s/lib/Target/SystemZ' % root.llvm_src_root,
32 '-I%s/lib/Target/X86' % root.llvm_src_root,
33 '-I%s/lib/Target/XCore' % root.llvm_src_root,
34 '-I%s/lib/Target/Alpha' % target_obj_root,
35 '-I%s/lib/Target/ARM' % target_obj_root,
36 '-I%s/lib/Target/Blackfin' % target_obj_root,
37 '-I%s/lib/Target/CBackend' % target_obj_root,
38 '-I%s/lib/Target/CellSPU' % target_obj_root,
39 '-I%s/lib/Target/CppBackend' % target_obj_root,
40 '-I%s/lib/Target/Mips' % target_obj_root,
41 '-I%s/lib/Target/MSIL' % target_obj_root,
42 '-I%s/lib/Target/MSP430' % target_obj_root,
43 '-I%s/lib/Target/PIC16' % target_obj_root,
44 '-I%s/lib/Target/PowerPC' % target_obj_root,
45 '-I%s/lib/Target/Sparc' % target_obj_root,
46 '-I%s/lib/Target/SystemZ' % target_obj_root,
47 '-I%s/lib/Target/X86' % target_obj_root,
48 '-I%s/lib/Target/XCore' % target_obj_root];
