Lines Matching defs:Reg
49 unsigned Reg, unsigned OpIdx,
62 static bool isUndefCopy(MachineInstr *MI, unsigned Reg,
67 if (MO1.getReg() != Reg)
110 unsigned Reg = MI->getOperand(0).getReg();
111 ImpDefRegs.insert(Reg);
112 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
113 for (const unsigned *SS = TRI->getSubRegisters(Reg); *SS; ++SS)
139 unsigned Reg = MO.getReg();
140 if (!Reg)
142 if (!ImpDefRegs.count(Reg))
145 if (CanTurnIntoImplicitDef(MI, Reg, i, ImpDefRegs)) {
151 ImpDefRegs.erase(Reg);
152 LiveVariables::VarInfo& vi = LV->getVarInfo(Reg);
165 MI->addRegisterDefined(Reg);
172 if (MOJ.isReg() && MOJ.isUse() && MOJ.getReg() == Reg)
175 ImpDefRegs.erase(Reg);
195 unsigned Reg = MI->getOperand(0).getReg();
196 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
197 !ImpDefRegs.count(Reg)) {
210 for (MachineRegisterInfo::def_iterator DI = MRI->def_begin(Reg),
229 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
242 if (isUndefCopy(RMI, Reg, ImpDefRegs)) {
249 if (RRMO.isReg() && RRMO.getReg() == Reg) {
263 LiveVariables::VarInfo& vi = LV->getVarInfo(Reg);
269 // Replace Reg with a new vreg that's marked implicit.
270 const TargetRegisterClass* RC = MRI->getRegClass(Reg);
275 if (RRMO.isReg() && RRMO.getReg() == Reg) {
