Lines Matching defs:Order
148 /// handled_ - Intervals are added to the handled_ set in the order of their
613 // physical register or spill an interval (possibly this one) in order to
1160 ArrayRef<unsigned> Order = RegClassInfo.getOrder(RC);
1162 for (unsigned i = 0; i != Order.size(); ++i) {
1163 unsigned reg = Order[i];
1173 for (unsigned i = 0; i != Order.size(); ++i) {
1174 unsigned reg = Order[i];
1325 // Scan handled in reverse order up to the earliest start of a
1434 ArrayRef<unsigned> Order;
1436 Order = tri_->getRawAllocationOrder(RC, Hint.first, physReg, *mf_);
1438 Order = RegClassInfo.getOrder(RC);
1440 assert(!Order.empty() && "No allocatable register in this register class!");
1443 for (unsigned i = 0; i != Order.size(); ++i) {
1444 unsigned Reg = Order[i];
1474 for (unsigned i = 0; i != Order.size(); ++i) {
1475 unsigned Reg = Order[i];
