Lines Matching refs:Result
240 /// signed operation and 2 if the result is an unsigned comparison. Return zero
258 /// getSetCCOrOperation - Return the result of a logical OR between different
282 /// getSetCCAndOperation - Return the result of a logical AND between different
293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
297 switch (Result) {
299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
307 return Result;
532 /// given list, and any nodes that become unreachable as a result.
649 // flag result (which cannot be CSE'd) or is one of the special cases that are
947 SDValue Result(N, 0);
950 Ops.assign(VT.getVectorNumElements(), Result);
951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
953 return Result;
989 SDValue Result(N, 0);
992 Ops.assign(VT.getVectorNumElements(), Result);
994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
996 return Result;
1607 // If either the LHS or the RHS are Zero, the result is zero.
1718 // The boolean result conforms to getBooleanContents. Fall through.
1720 // If we know the result of a setcc has the top bits zero, use this info.
1798 // Sign extension. Compute the demanded bits in the result that are not
1816 // top bits of the result.
1882 // want it set in the KnownZero and KnownOne result values. Reset the
1883 // mask and reapply it to the result values.
2029 // Since the result is less than or equal to either operand, any leading
2030 // zero bits in either operand must also exist in the result.
2153 // The boolean result conforms to getBooleanContents. Fall through.
2194 // out of the result.
2263 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2737 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2856 // result is implicitly extended.
3373 // This can result in a type that is not legal on the target, e.g.
3653 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3656 if (Result.getNode())
3657 return Result;
3662 SDValue Result =
3666 if (Result.getNode())
3667 return Result;
3717 SDValue Result =
3721 if (Result.getNode())
3722 return Result;
3727 SDValue Result =
3730 if (Result.getNode())
3731 return Result;
3768 SDValue Result =
3772 if (Result.getNode())
3773 return Result;
3778 SDValue Result =
3781 if (Result.getNode())
3782 return Result;
4497 SDVTList Result = makeVTList(Array, 2);
4498 VTList.push_back(Result);
4499 return Result;
4513 SDVTList Result = makeVTList(Array, 3);
4514 VTList.push_back(Result);
4515 return Result;
4530 SDVTList Result = makeVTList(Array, 4);
4531 VTList.push_back(Result);
4532 return Result;
4562 SDVTList Result = makeVTList(Array, NumVTs);
4563 VTList.push_back(Result);
4564 return Result;
4836 // use list. Keep track of any operands that become dead as a result.
5073 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5075 return SDValue(Result, 0);
5152 /// This version assumes From has a single result value.
5164 // replacement is happening, because any such uses would be the result
5240 /// This version can replace From with any result values. To must match the
5431 // A node with no uses, add it to the result array immediately.
