Lines Matching full:instruction
10 // This file contains the actual instruction interpreter.
45 // Binary Instruction Implementations
59 dbgs() << "Unhandled type for FAdd instruction: " << *Ty << "\n";
70 dbgs() << "Unhandled type for FSub instruction: " << *Ty << "\n";
81 dbgs() << "Unhandled type for FMul instruction: " << *Ty << "\n";
92 dbgs() << "Unhandled type for FDiv instruction: " << *Ty << "\n";
107 dbgs() << "Unhandled type for Rem instruction: " << *Ty << "\n";
295 dbgs() << "Unhandled type for FCmp EQ instruction: " << *Ty << "\n";
309 dbgs() << "Unhandled type for FCmp NE instruction: " << *Ty << "\n";
322 dbgs() << "Unhandled type for FCmp LE instruction: " << *Ty << "\n";
335 dbgs() << "Unhandled type for FCmp GE instruction: " << *Ty << "\n";
348 dbgs() << "Unhandled type for FCmp LT instruction: " << *Ty << "\n";
361 dbgs() << "Unhandled type for FCmp GT instruction: " << *Ty << "\n";
529 case Instruction::Add: R.IntVal = Src1.IntVal + Src2.IntVal; break;
530 case Instruction::Sub: R.IntVal = Src1.IntVal - Src2.IntVal; break;
531 case Instruction::Mul: R.IntVal = Src1.IntVal * Src2.IntVal; break;
532 case Instruction::FAdd: executeFAddInst(R, Src1, Src2, Ty); break;
533 case Instruction::FSub: executeFSubInst(R, Src1, Src2, Ty); break;
534 case Instruction::FMul: executeFMulInst(R, Src1, Src2, Ty); break;
535 case Instruction::FDiv: executeFDivInst(R, Src1, Src2, Ty); break;
536 case Instruction::FRem: executeFRemInst(R, Src1, Src2, Ty); break;
537 case Instruction::UDiv: R.IntVal = Src1.IntVal.udiv(Src2.IntVal); break;
538 case Instruction::SDiv: R.IntVal = Src1.IntVal.sdiv(Src2.IntVal); break;
539 case Instruction::URem: R.IntVal = Src1.IntVal.urem(Src2.IntVal); break;
540 case Instruction::SRem: R.IntVal = Src1.IntVal.srem(Src2.IntVal); break;
541 case Instruction::And: R.IntVal = Src1.IntVal & Src2.IntVal; break;
542 case Instruction::Or: R.IntVal = Src1.IntVal | Src2.IntVal; break;
543 case Instruction::Xor: R.IntVal = Src1.IntVal ^ Src2.IntVal; break;
568 // Terminator Instruction Implementations
603 if (Instruction *I = CallingSF.Caller.getInstruction()) {
630 Instruction *Inst;
642 // Go to exceptional destination BB of invoke instruction
647 report_fatal_error("Program executed an 'unreachable' instruction!");
689 // This function handles the actual updating of block and instruction iterators
701 SF.CurInst = SF.CurBB->begin(); // Update new instruction ptr...
727 // Memory Instruction Implementations
755 if (I.getOpcode() == Instruction::Alloca)
829 // Miscellaneous Instruction Implementations
864 // Restore the CurInst pointer to the first instruction newly inserted, if
963 "Invalid FPTrunc instruction");
972 "Invalid FPTrunc instruction");
982 assert(SrcTy->isFloatingPointTy() && "Invalid FPToUI instruction");
996 assert(SrcTy->isFloatingPointTy() && "Invalid FPToSI instruction");
1008 assert(DstTy->isFloatingPointTy() && "Invalid UIToFP instruction");
1020 assert(DstTy->isFloatingPointTy() && "Invalid SIToFP instruction");
1034 assert(SrcVal->getType()->isPointerTy() && "Invalid PtrToInt instruction");
1043 assert(DstTy->isPointerTy() && "Invalid PtrToInt instruction");
1165 dbgs() << "Unhandled dest type for vaarg instruction: " << *Ty << "\n";
1169 // Set the Value of this Instruction.
1179 case Instruction::Trunc:
1181 case Instruction::ZExt:
1183 case Instruction::SExt:
1185 case Instruction::FPTrunc:
1187 case Instruction::FPExt:
1189 case Instruction::UIToFP:
1191 case Instruction::SIToFP:
1193 case Instruction::FPToUI:
1195 case Instruction::FPToSI:
1197 case Instruction::PtrToInt:
1199 case Instruction::IntToPtr:
1201 case Instruction::BitCast:
1203 case Instruction::GetElementPtr:
1206 case Instruction::FCmp:
1207 case Instruction::ICmp:
1212 case Instruction::Select:
1227 case Instruction::Add: Dest.IntVal = Op0.IntVal + Op1.IntVal; break;
1228 case Instruction::Sub: Dest.IntVal = Op0.IntVal - Op1.IntVal; break;
1229 case Instruction::Mul: Dest.IntVal = Op0.IntVal * Op1.IntVal; break;
1230 case Instruction::FAdd: executeFAddInst(Dest, Op0, Op1, Ty); break;
1231 case Instruction::FSub: executeFSubInst(Dest, Op0, Op1, Ty); break;
1232 case Instruction::FMul: executeFMulInst(Dest, Op0, Op1, Ty); break;
1233 case Instruction::FDiv: executeFDivInst(Dest, Op0, Op1, Ty); break;
1234 case Instruction::FRem: executeFRemInst(Dest, Op0, Op1, Ty); break;
1235 case Instruction::SDiv: Dest.IntVal = Op0.IntVal.sdiv(Op1.IntVal); break;
1236 case Instruction::UDiv: Dest.IntVal = Op0.IntVal.udiv(Op1.IntVal); break;
1237 case Instruction::URem: Dest.IntVal = Op0.IntVal.urem(Op1.IntVal); break;
1238 case Instruction::SRem: Dest.IntVal = Op0.IntVal.srem(Op1.IntVal); break;
1239 case Instruction::And: Dest.IntVal = Op0.IntVal & Op1.IntVal; break;
1240 case Instruction::Or: Dest.IntVal = Op0.IntVal | Op1.IntVal; break;
1241 case Instruction::Xor: Dest.IntVal = Op0.IntVal ^ Op1.IntVal; break;
1242 case Instruction::Shl:
1245 case Instruction::LShr:
1248 case Instruction::AShr:
1291 // Simulate a 'ret' instruction of the appropriate type.
1296 // Get pointers to first LLVM BB & Instruction in function.
1318 // Interpret a single instruction & increment the "PC".
1320 Instruction &I = *SF.CurInst++; // Increment before execute
1328 // This is not safe, as visiting the instruction could lower it and free I.
