Lines Matching refs:Imm
70 //case ISD::ROTL: // Only if imm -> turn into ROTR.
117 // reg [asr|lsl|lsr|ror|rrx] imm
120 // reg, the second is the shift amount (or reg0 if not present or imm). The
121 // third operand encodes the shift opcode and the imm if a reg isn't present.
123 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) {
124 return ShOp | (Imm << 3);
133 /// getSOImmValImm - Given an encoded imm field for the reg/imm form, return
134 /// the 8-bit imm value.
135 static inline unsigned getSOImmValImm(unsigned Imm) {
136 return Imm & 0xFF;
138 /// getSOImmValRot - Given an encoded imm field for the reg/imm form, return
140 static inline unsigned getSOImmValRot(unsigned Imm) {
141 return (Imm >> 8) * 2;
144 /// getSOImmValRotate - Try to handle Imm with an immediate shifter operand,
148 static inline unsigned getSOImmValRotate(unsigned Imm) {
151 if ((Imm & ~255U) == 0) return 0;
154 unsigned TZ = CountTrailingZeros_32(Imm);
161 if ((rotr32(Imm, RotAmt) & ~255U) == 0)
166 if (Imm & 63U) {
167 unsigned TZ2 = CountTrailingZeros_32(Imm & ~63U);
169 if ((rotr32(Imm, RotAmt2) & ~255U) == 0)
227 /// getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed
229 static inline unsigned getThumbImmValShift(unsigned Imm) {
232 if ((Imm & ~255U) == 0) return 0;
235 return CountTrailingZeros_32(Imm);
246 /// getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed
248 static inline unsigned getThumbImm16ValShift(unsigned Imm) {
251 if ((Imm & ~65535U) == 0) return 0;
254 return CountTrailingZeros_32(Imm);
282 unsigned u, Vs, Imm;
290 Imm = Vs & 0xff;
292 u = Imm | (Imm << 16);
296 return (((Vs == V) ? 1 : 2) << 8) | Imm;
300 return (3 << 8) | Imm;
346 static inline bool isT2SOImmTwoPartVal (unsigned Imm) {
347 unsigned V = Imm;
361 V = Imm;
373 static inline unsigned getT2SOImmTwoPartFirst(unsigned Imm) {
374 assert (isT2SOImmTwoPartVal(Imm) &&
377 unsigned V = rotr32 (~255, getT2SOImmValRotate(Imm)) & Imm;
382 if (getT2SOImmValSplatVal(Imm & 0xff00ff00U) != -1)
383 return Imm & 0xff00ff00U;
386 assert (getT2SOImmValSplatVal(Imm & 0x00ff00ffU) != -1);
387 return Imm & 0x00ff00ffU;
390 static inline unsigned getT2SOImmTwoPartSecond(unsigned Imm) {
392 Imm ^= getT2SOImmTwoPartFirst(Imm);
394 assert (getT2SOImmVal(Imm) != -1 &&
396 return Imm;
406 // addrmode2 := reg +/- reg shop imm
420 assert(Imm12 < (1 << 12) && "Imm too large!");
