Lines Matching refs:PredReg
1308 llvm::getInstrPredicate(const MachineInstr *MI, unsigned &PredReg) {
1311 PredReg = 0;
1315 PredReg = MI->getOperand(PIdx+1).getReg();
1336 ARMCC::CondCodes Pred, unsigned PredReg,
1355 .addImm((unsigned)Pred).addReg(PredReg).addReg(0)
