Lines Matching defs:Binary
75 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
89 void emitWordLE(unsigned Binary);
90 void emitDWordLE(uint64_t Binary);
152 /// getMachineOpValue - Return binary encoding of operand. If the machine
265 uint32_t Binary;
266 Binary = Imm12 & 0xfff;
268 Binary |= (1 << 12);
269 Binary |= (Reg << 13);
270 return Binary;
309 uint32_t Binary = 0;
312 Binary |= (Reg << 9);
319 Binary |= 1 << 8;
320 Binary |= ImmOffs & 0xff;
321 return Binary;
326 Binary |= 1 << 8;
327 return Binary;
344 /// getMovi32Value - Return binary encoding of operand for movw/movt. If the
423 /// getMovi32Value - Return binary encoding of operand for movw/movt. If the
448 /// getMachineOpValue - Return binary encoding of operand. If the machine
528 void ARMCodeEmitter::emitWordLE(unsigned Binary) {
530 errs().write_hex(Binary) << "\n");
531 MCE.emitWordLE(Binary);
534 void ARMCodeEmitter::emitDWordLE(uint64_t Binary) {
536 errs().write_hex(Binary) << "\n");
537 MCE.emitDWordLE(Binary);
731 unsigned Binary = 0x30 << 20; // mov: Insts{27-20} = 0b00110000
736 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
739 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
742 Binary |= Lo16 & 0xFFF; // Insts{11-0} = imm12
743 Binary |= ((Lo16 >> 12) & 0xF) << 16; // Insts{19-16} = imm4
744 emitWordLE(Binary);
748 Binary = 0x34 << 20; // movt: Insts{27-20} = 0b00110100
751 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
754 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
757 Binary |= Hi16 & 0xFFF;
758 Binary |= ((Hi16 >> 12) & 0xF) << 16;
759 emitWordLE(Binary);
771 unsigned Binary = 0xd << 21; // mov: Insts{24-21} = 0b1101
774 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
777 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
781 Binary |= 1 << ARMII::I_BitShift;
782 Binary |= getMachineSoImmOpValue(V1);
783 emitWordLE(Binary);
786 Binary = 0xc << 21; // orr: Insts{24-21} = 0b1100
789 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
792 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
795 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRnShift;
799 Binary |= 1 << ARMII::I_BitShift;
800 Binary |= getMachineSoImmOpValue(V2);
801 emitWordLE(Binary);
808 unsigned Binary = 0;
811 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
814 Binary |= getAddrModeSBit(MI, MCID);
817 Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
820 Binary |= getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift;
824 Binary |= 1 << ARMII::I_BitShift;
827 emitWordLE(Binary);
836 unsigned Binary = 0x4 << 21; // add: Insts{24-21} = 0b0100
839 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
842 Binary |= getAddrModeSBit(MI, MCID);
845 Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
848 Binary |= getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift;
851 Binary |= 1 << ARMII::I_BitShift;
854 emitWordLE(Binary);
860 // Part of binary is determined by TableGn.
861 unsigned Binary = getBinaryCodeForInstr(MI);
864 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
868 Binary |= 1 << ARMII::S_BitShift;
871 Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
878 Binary |= 0x6 << 4;
882 Binary |= (0x2 << 4) | (1 << 7);
886 Binary |= (0x4 << 4) | (1 << 7);
891 Binary |= getMachineOpValue(MI, 1);
893 emitWordLE(Binary);
920 unsigned Binary = 0x01a0e00f;
921 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
922 emitWordLE(Binary);
1005 unsigned Binary = getMachineOpValue(MI, MO);
1043 Binary |= SBits << 4;
1045 return Binary;
1051 return Binary | (getARMRegisterNumbering(Rs) << ARMII::RegRsShift);
1055 return Binary | ARM_AM::getSORegOffset(MO2.getImm()) << 7;
1063 unsigned Binary = (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1)
1067 Binary |= ARM_AM::getSOImmValImm((unsigned)SoImmVal);
1068 return Binary;
1086 // Part of binary is determined by TableGn.
1087 unsigned Binary = getBinaryCodeForInstr(MI);
1090 emitWordLE(Binary);
1095 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1098 Binary |= getAddrModeSBit(MI, MCID);
1104 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
1107 Binary |= (getARMRegisterNumbering(ImplicitRd) << ARMII::RegRdShift);
1114 Binary |= Lo16 & 0xFFF;
1115 Binary |= ((Lo16 >> 12) & 0xF) << 16;
1116 emitWordLE(Binary);
1121 Binary |= Hi16 & 0xFFF;
1122 Binary |= ((Hi16 >> 12) & 0xF) << 16;
1123 emitWordLE(Binary);
1130 Binary |= (msb & 0x1F) << 16;
1131 Binary |= (lsb & 0x1F) << 7;
1132 emitWordLE(Binary);
1136 Binary |= getMachineOpValue(MI, OpIdx++);
1142 Binary |= (widthm1 & 0x1F) << 16;
1143 Binary |= (lsb & 0x1F) << 7;
1144 emitWordLE(Binary);
1157 Binary |= (getARMRegisterNumbering(ImplicitRn) << ARMII::RegRnShift);
1159 Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift;
1168 emitWordLE(Binary | getMachineSoRegOpValue(MI, MCID, MO, OpIdx));
1174 emitWordLE(Binary | getARMRegisterNumbering(MO.getReg()));
1179 Binary |= getMachineSoImmOpValue((unsigned)MO.getImm());
1181 emitWordLE(Binary);
1191 // Part of binary is determined by TableGn.
1192 unsigned Binary = getBinaryCodeForInstr(MI);
1198 emitWordLE(Binary);
1203 Binary = 0x710F000;
1205 Binary = 0x1A0F000;
1208 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1223 Binary |= (getARMRegisterNumbering(ImplicitRd) << ARMII::RegRdShift);
1225 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
1230 Binary |= (getARMRegisterNumbering(ImplicitRn) << ARMII::RegRnShift);
1232 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
1243 Binary |= ((ARM_AM::getAM2Op(AM2Opc) == ARM_AM::add ? 1 : 0) <<
1248 Binary |= ARM_AM::getAM2Offset(AM2Opc);
1249 emitWordLE(Binary);
1254 Binary |= 1 << ARMII::I_BitShift;
1257 Binary |= getARMRegisterNumbering(MO2.getReg());
1262 Binary |= getShiftOp(AM2Opc) << ARMII::ShiftImmShift; // shift
1263 Binary |= ShImm << ARMII::ShiftShift; // shift_immed
1266 emitWordLE(Binary);
1275 // Part of binary is determined by TableGn.
1276 unsigned Binary = getBinaryCodeForInstr(MI);
1279 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1292 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
1301 Binary |= (getARMRegisterNumbering(ImplicitRn) << ARMII::RegRnShift);
1303 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
1314 Binary |= ((ARM_AM::getAM3Op(AM3Opc) == ARM_AM::add ? 1 : 0) <<
1320 Binary |= getARMRegisterNumbering(MO2.getReg());
1321 emitWordLE(Binary);
1326 Binary |= 1 << ARMII::AM3_I_BitShift;
1329 Binary |= (ImmOffs >> 4) << ARMII::ImmHiShift; // immedH
1330 Binary |= (ImmOffs & 0xF); // immedL
1333 emitWordLE(Binary);
1337 unsigned Binary = 0;
1347 case ARM_AM::db: Binary |= 0x1 << ARMII::P_BitShift; break;
1348 case ARM_AM::ia: Binary |= 0x1 << ARMII::U_BitShift; break;
1349 case ARM_AM::ib: Binary |= 0x3 << ARMII::U_BitShift; break;
1352 return Binary;
1359 // Part of binary is determined by TableGn.
1360 unsigned Binary = getBinaryCodeForInstr(MI);
1364 Binary |= 0x8B00000;
1368 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1376 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
1380 Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(Mode));
1384 Binary |= 0x1 << ARMII::W_BitShift;
1394 Binary |= 0x1 << RegNum;
1397 emitWordLE(Binary);
1403 // Part of binary is determined by TableGn.
1404 unsigned Binary
1407 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1410 Binary |= getAddrModeSBit(MI, MCID);
1416 Binary |= getMachineOpValue (MI, OpIdx++) << ARMII::RegRdLoShift;
1419 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdHiShift;
1422 Binary |= getMachineOpValue(MI, OpIdx++);
1425 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRsShift;
1432 Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRdLoShift;
1434 emitWordLE(Binary);
1440 // Part of binary is determined by TableGn.
1441 unsigned Binary = getBinaryCodeForInstr(MI);
1444 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1449 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
1456 Binary |= getMachineOpValue(MI, MO1) << ARMII::RegRnShift;
1459 Binary |= getMachineOpValue(MI, MO2);
1462 Binary |= getMachineOpValue(MI, MO1);
1469 Binary |= (getMachineOpValue(MI, OpIdx) / 8) << ARMII::ExtRotImmShift;
1471 emitWordLE(Binary);
1477 // Part of binary is determined by TableGn.
1478 unsigned Binary = getBinaryCodeForInstr(MI);
1481 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1485 emitWordLE(Binary);
1492 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRdShift;
1499 Binary |= getMachineOpValue(MI, MO);
1500 emitWordLE(Binary);
1505 Binary |= getMachineOpValue(MI, MO) << ARMII::RegRnShift;
1508 Binary |= getMachineOpValue(MI, OpIdx++);
1518 Binary |= ShiftAmt << ARMII::ShiftShift;
1520 emitWordLE(Binary);
1526 // Part of binary is determined by TableGen.
1527 unsigned Binary = getBinaryCodeForInstr(MI);
1530 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1533 Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
1543 Binary |= Pos << 16;
1546 Binary |= getMachineOpValue(MI, 2);
1553 Binary |= (1 << 6);
1558 Binary |= ShiftAmt << ARMII::ShiftShift;
1561 emitWordLE(Binary);
1571 // Part of binary is determined by TableGn.
1572 unsigned Binary = getBinaryCodeForInstr(MI);
1575 Binary = 0xEA000000;
1579 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1582 Binary |= getMachineOpValue(MI, 0);
1584 emitWordLE(Binary);
1630 // Part of binary is determined by TableGn.
1631 unsigned Binary = getBinaryCodeForInstr(MI);
1634 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1638 Binary |= getARMRegisterNumbering(ARM::LR);
1641 Binary |= getMachineOpValue(MI, 0);
1643 emitWordLE(Binary);
1648 unsigned Binary = 0;
1652 Binary |= (RegD & 0x0F) << ARMII::RegRdShift;
1653 Binary |= ((RegD & 0x10) >> 4) << ARMII::D_BitShift;
1655 Binary |= ((RegD & 0x1E) >> 1) << ARMII::RegRdShift;
1656 Binary |= (RegD & 0x01) << ARMII::D_BitShift;
1658 return Binary;
1663 unsigned Binary = 0;
1667 Binary |= (RegN & 0x0F) << ARMII::RegRnShift;
1668 Binary |= ((RegN & 0x10) >> 4) << ARMII::N_BitShift;
1670 Binary |= ((RegN & 0x1E) >> 1) << ARMII::RegRnShift;
1671 Binary |= (RegN & 0x01) << ARMII::N_BitShift;
1673 return Binary;
1678 unsigned Binary = 0;
1682 Binary |= (RegM & 0x0F);
1683 Binary |= ((RegM & 0x10) >> 4) << ARMII::M_BitShift;
1685 Binary |= ((RegM & 0x1E) >> 1);
1686 Binary |= (RegM & 0x01) << ARMII::M_BitShift;
1688 return Binary;
1694 // Part of binary is determined by TableGn.
1695 unsigned Binary = getBinaryCodeForInstr(MI);
1698 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1703 Binary |= encodeVFPRd(MI, OpIdx++);
1711 Binary |= encodeVFPRn(MI, OpIdx++);
1717 emitWordLE(Binary);
1722 Binary |= encodeVFPRm(MI, OpIdx);
1724 emitWordLE(Binary);
1731 // Part of binary is determined by TableGn.
1732 unsigned Binary = getBinaryCodeForInstr(MI);
1735 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1743 Binary |= encodeVFPRd(MI, 0);
1747 Binary |= encodeVFPRn(MI, 0);
1751 Binary |= encodeVFPRm(MI, 0);
1759 Binary |= encodeVFPRm(MI, 1);
1764 Binary |= encodeVFPRn(MI, 1);
1769 Binary |= encodeVFPRd(MI, 1);
1775 Binary |= encodeVFPRn(MI, 2);
1778 Binary |= encodeVFPRm(MI, 2);
1780 emitWordLE(Binary);
1784 // Part of binary is determined by TableGn.
1785 unsigned Binary = getBinaryCodeForInstr(MI);
1788 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1792 emitWordLE(Binary);
1799 Binary |= encodeVFPRd(MI, OpIdx++);
1803 Binary |= getMachineOpValue(MI, Base) << ARMII::RegRnShift;
1810 Binary |= 1 << ARMII::U_BitShift;
1811 Binary |= ImmOffs;
1812 emitWordLE(Binary);
1818 Binary |= 1 << ARMII::U_BitShift;
1820 emitWordLE(Binary);
1828 // Part of binary is determined by TableGn.
1829 unsigned Binary = getBinaryCodeForInstr(MI);
1832 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1840 Binary |= getMachineOpValue(MI, OpIdx++) << ARMII::RegRnShift;
1844 Binary |= getAddrModeUPBits(ARM_AM::getAM4SubMode(Mode));
1848 Binary |= 0x1 << ARMII::W_BitShift;
1851 Binary |= encodeVFPRd(MI, OpIdx+2);
1863 if(Binary & 0x100)
1864 Binary |= NumRegs * 2;
1866 Binary |= NumRegs;
1868 emitWordLE(Binary);
1873 // Part of binary is determined by TableGn.
1874 unsigned Binary = getBinaryCodeForInstr(MI);
1878 Binary &= ~(0x780000 >> 19);
1879 Binary |= (Imm & 0x780000) >> 19;
1880 Binary &= ~(0x3800000 >> 7);
1881 Binary |= (Imm & 0x3800000) >> 7;
1882 Binary = VFPThumb2PostEncoder(MI, Binary);
1886 Binary |= II->getPredicate(&MI) << ARMII::CondShift;
1888 emitWordLE(Binary);
1893 unsigned Binary = 0;
1895 Binary |= (RegD & 0xf) << ARMII::RegRdShift;
1896 Binary |= ((RegD >> 4) & 1) << ARMII::D_BitShift;
1897 return Binary;
1902 unsigned Binary = 0;
1904 Binary |= (RegN & 0xf) << ARMII::RegRnShift;
1905 Binary |= ((RegN >> 4) & 1) << ARMII::N_BitShift;
1906 return Binary;
1911 unsigned Binary = 0;
1913 Binary |= (RegM & 0xf);
1914 Binary |= ((RegM >> 4) & 1) << ARMII::M_BitShift;
1915 return Binary;
1920 static unsigned convertNEONDataProcToThumb(unsigned Binary) {
1921 assert((Binary & 0xfe000000) == 0xf2000000 &&
1923 unsigned UBit = (Binary >> 24) & 1;
1924 return 0xef000000 | (UBit << 28) | (Binary & 0xffffff);
1928 unsigned Binary = getBinaryCodeForInstr(MI);
1943 Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift;
1947 Binary |= (RegT << ARMII::RegRdShift);
1948 Binary |= encodeNEONRn(MI, RegNOpIdx);
1951 if ((Binary & (1 << 22)) != 0)
1953 else if ((Binary & (1 << 5)) != 0)
1962 Binary |= (Opc1 << 21);
1963 Binary |= (Opc2 << 5);
1965 emitWordLE(Binary);
1969 unsigned Binary = getBinaryCodeForInstr(MI);
1972 Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift;
1976 Binary |= (RegT << ARMII::RegRdShift);
1977 Binary |= encodeNEONRn(MI, 0);
1978 emitWordLE(Binary);
1982 unsigned Binary = getBinaryCodeForInstr(MI);
1984 Binary |= encodeNEONRd(MI, 0);
1992 Binary |= (I << 24) | (Imm3 << 16) | (Cmode << 8) | (Op << 5) | Imm4;
1994 Binary = convertNEONDataProcToThumb(Binary);
1995 emitWordLE(Binary);
2000 unsigned Binary = getBinaryCodeForInstr(MI);
2003 Binary |= encodeNEONRd(MI, OpIdx++);
2006 Binary |= encodeNEONRm(MI, OpIdx);
2008 Binary = convertNEONDataProcToThumb(Binary);
2010 emitWordLE(Binary);
2015 unsigned Binary = getBinaryCodeForInstr(MI);
2018 Binary |= encodeNEONRd(MI, OpIdx++);
2021 Binary |= encodeNEONRn(MI, OpIdx++);
2024 Binary |= encodeNEONRm(MI, OpIdx);
2026 Binary = convertNEONDataProcToThumb(Binary);
2028 emitWordLE(Binary);
