Cross Reference: /external/llvm/lib/Target/ARM/ARMCodeEmitter.cpp

Lines Matching defs:MO1
258       const MachineOperand &MO1 = MI.getOperand(Op + 1);
264       int32_t Imm12 = MO1.getImm();
316           const MachineOperand &MO1 = MI.getOperand(Op + 1);
317         if (uint32_t ImmOffs = ARM_AM::getAM5Offset(MO1.getImm())) {
318           if (ARM_AM::getAM5Op(MO1.getImm()) == ARM_AM::add)
728   const MachineOperand &MO1 = MI.getOperand(1);
733   unsigned Lo16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movw) & 0xFFFF;
746   unsigned Hi16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movt) >> 16;
764   const MachineOperand &MO1 = MI.getOperand(1);
765   assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1.getImm()) &&
767   unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm());
768   unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO1.getImm());
1007   const MachineOperand &MO1 = MI.getOperand(OpIdx + 1);
1013   unsigned Rs = MO1.getReg();
1451   const MachineOperand &MO1 = MI.getOperand(OpIdx++);
1456     Binary |= getMachineOpValue(MI, MO1) << ARMII::RegRnShift;
1462     Binary |= getMachineOpValue(MI, MO1);
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