Home | History | Annotate | Download | only in ARM

Lines Matching refs:PredReg

642   unsigned PredReg = 0;
643   ARMCC::CondCodes Pred = llvm::getInstrPredicate(&MI, PredReg);
666     LO16.addImm(Pred).addReg(PredReg).addReg(0);
667     HI16.addImm(Pred).addReg(PredReg).addReg(0);
703   LO16.addImm(Pred).addReg(PredReg);
704   HI16.addImm(Pred).addReg(PredReg);