Lines Matching refs:SPUTargetLowering
9 // This file implements the SPUTargetLowering class.
62 bool isSigned, SDValue &Hi, const SPUTargetLowering &TLI) {
95 SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
461 SPUTargetLowering::getTargetNodeName(unsigned Opcode) const
500 MVT::SimpleValueType SPUTargetLowering::getSetCCResultType(EVT VT) const {
1102 SPUTargetLowering::LowerFormalArguments(SDValue Chain,
1253 SPUTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
1450 SPUTargetLowering::LowerReturn(SDValue Chain,
2456 const SPUTargetLowering &TLI) {
2482 const SPUTargetLowering &TLI) {
2769 SPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
2777 errs() << "SPUTargetLowering::LowerOperation(): need to lower this!\n";
2863 void SPUTargetLowering::ReplaceNodeResults(SDNode *N,
2873 errs() << "SPUTargetLowering::ReplaceNodeResults(): need to fix this!\n";
2891 SPUTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const
3081 SPUTargetLowering::ConstraintType
3082 SPUTargetLowering::getConstraintType(const std::string &ConstraintLetter) const {
3101 SPUTargetLowering::getSingleConstraintMatchWeight(
3130 SPUTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
3157 SPUTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
3189 SPUTargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
3208 SPUTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
3218 bool SPUTargetLowering::isLegalAddressImmediate(int64_t V,
3224 bool SPUTargetLowering::isLegalAddressImmediate(llvm::GlobalValue* GV) const {
3229 SPUTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
3235 bool SPUTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
3241 SPUTargetLowering::isLegalAddressingMode(const AddrMode &AM,