Lines Matching refs:Index
79 /// simple subregister reference. Idx is an index in the 128 bits we
108 // This is the index of the first element of the 128-bit chunk
126 /// simple superregister reference. Idx is an index in the 128 bits
147 // This is the index of the first element of the 128-bit chunk
1780 // If the function takes variable number of arguments, make a frame index for
2215 // Create frame index.
3534 // The index should be aligned on a 128-bit boundary.
3535 uint64_t Index =
3541 bool Result = (Index * ElSize) % 128 == 0;
3553 // The index should be aligned on a 128-bit boundary.
3554 uint64_t Index =
3560 bool Result = (Index * ElSize) % 128 == 0;
3634 /// to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128
3640 uint64_t Index =
3648 return Index / NumElemsPerChunk;
3652 /// to insert at the specified INSERT_SUBVECTOR index with VINSERTF128
3658 uint64_t Index =
3666 return Index / NumElemsPerChunk;
3965 static SDValue getShuffleScalarElt(SDNode *N, int Index, SelectionDAG &DAG,
3976 Index = SV->getMaskElt(Index);
3978 if (Index < 0)
3982 SDValue NewV = (Index < NumElems) ? SV->getOperand(0) : SV->getOperand(1);
3983 return getShuffleScalarElt(NewV.getNode(), Index % NumElems, DAG, Depth+1);
4048 // The index 0 always comes from the first element of the second source,
4051 unsigned OpNum = (Index == 0) ? 1 : 0;
4052 return getShuffleScalarElt(V.getOperand(OpNum).getNode(), Index, DAG,
4060 Index = ShuffleMask[Index];
4061 if (Index < 0)
4064 SDValue NewV = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
4065 return getShuffleScalarElt(NewV.getNode(), Index % NumElems, DAG,
4080 return (Index == 0) ? V.getOperand(0)
4084 return V.getOperand(Index);
4098 unsigned Index = ZerosFromLeft ? i : NumElems-i-1;
4099 SDValue Elt = getShuffleScalarElt(N, Index, DAG, 0);
4111 /// starting from its index OpIdx. Also tell OpNum which source vector operand.
4158 0, // Mask Start Index
4159 NumElems-NumZeros-1, // Mask End Index
4191 NumZeros, // Mask Start Index
4192 NumElems-1, // Mask End Index
5301 assert(Idx < 8 && "Invalid VECTOR_SHUFFLE index!");
6029 // the case of a store, it's not worth it if the index is a constant 0,
6046 // ExtractPS works with constant index.
6181 // zero here. The DAG Combiner may combine an extract_elt index into these
6193 // PINSR* works with constant index.
9141 DAG.getRegister(0, MVT::i32), // Index
9812 // x86 address has 4 operands: base, index, scale, and displacement
9930 // x86 address has 5 operands: base, index, scale, displacement, and segment.
10078 // x86 address has 4 operands: base, index, scale, and displacement
10231 MachineOperand &Index = MI->getOperand(3);
10338 .addOperand(Index)
10363 .addOperand(Index)
10390 .addOperand(Index)
10410 .addOperand(Index)
10446 .addOperand(Index)
11129 /// PerformEXTRACT_VECTOR_ELTCombine - Detect vector gather/scatter index
12206 // BT ignores high bits in the bit index operand.
