Lines Matching refs:KnownZero
54 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
58 KnownZero, KnownOne, 0);
69 APInt &KnownZero, APInt &KnownOne,
72 KnownZero, KnownOne, Depth);
86 /// to be one in the expression. KnownZero contains all the bits that are known
89 /// the expression. KnownOne and KnownZero always follow the invariant that
90 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that
91 /// the bits in KnownOne and KnownZero may only be accurate for those bits set
92 /// in DemandedMask. Note also that the bitwidth of V, DemandedMask, KnownZero
101 APInt &KnownZero, APInt &KnownOne,
112 KnownZero.getBitWidth() == BitWidth &&
114 "Value *V, DemandedMask, KnownZero and KnownOne "
119 KnownZero = ~KnownOne & DemandedMask;
125 KnownZero = DemandedMask;
129 KnownZero.clearAllBits();
145 ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
154 // context, we can at least compute the knownzero/knownone bits, and we can
208 // Compute the KnownZero/KnownOne bits to simplify things downstream.
209 ComputeMaskedBits(I, DemandedMask, KnownZero, KnownOne, Depth);
222 ComputeMaskedBits(I, DemandedMask, KnownZero, KnownOne, Depth);
254 KnownZero = RHSKnownZero | LHSKnownZero;
289 KnownZero = RHSKnownZero & LHSKnownZero;
366 KnownZero= (RHSKnownZero & LHSKnownZero) | (RHSKnownOne & LHSKnownOne);
387 KnownZero = RHSKnownZero & LHSKnownZero;
392 KnownZero = KnownZero.zext(truncBf);
395 KnownZero, KnownOne, Depth+1))
398 KnownZero = KnownZero.trunc(BitWidth);
400 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
421 KnownZero, KnownOne, Depth+1))
423 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
430 KnownZero = KnownZero.trunc(SrcBitWidth);
433 KnownZero, KnownOne, Depth+1))
436 KnownZero = KnownZero.zext(BitWidth);
438 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
440 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth);
457 KnownZero = KnownZero.trunc(SrcBitWidth);
460 KnownZero, KnownOne, Depth+1))
463 KnownZero = KnownZero.zext(BitWidth);
465 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
472 if (KnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits) {
542 KnownZero = LHSKnownZero & ~RHSVal & ~CarryBits;
575 ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
590 KnownZero, KnownOne, Depth+1))
592 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
593 KnownZero <<= ShiftAmt;
597 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
614 KnownZero, KnownOne, Depth+1))
616 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
617 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
622 KnownZero |= HighBits; // high bits known zero.
659 KnownZero, KnownOne, Depth+1))
661 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
664 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
674 if (BitWidth <= ShiftAmt || KnownZero[BitWidth-ShiftAmt-1] ||
703 KnownZero = LHSKnownZero & LowBits;
709 KnownZero |= ~LowBits;
716 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
722 if (DemandedMask.isNegative() && KnownZero.isNonNegative()) {
729 KnownZero
744 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & DemandedMask;
785 KnownZero = APInt::getHighBitsSet(64, 32);
789 ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
795 if ((DemandedMask & (KnownZero|KnownOne)) == DemandedMask)
