Lines Matching refs:For
11 ; for RSA/DSA.
13 ; See http://devresource.hp.com/ for more details on the PA-RISC
15 ; by Gerry Kane for information on the instruction set architecture.
28 ; Global Register definitions used for the routines.
30 ; Some information about HP's runtime architecture for 32-bits.
37 ; For the floating point registers
43 ; For the integer registers
63 ; Note that the "w" argument for bn_mul_add_words and bn_mul_words
280 EXTRD,U %ret1,31,32,%ret0 ; for 32-bit, return in ret0/ret1
441 EXTRD,U %ret1,31,32,%ret0 ; for 32-bit, return in ret0/ret1
646 EXTRD,U %ret1,31,32,%ret0 ; for 32-bit, return in ret0/ret1
732 EXTRD,U %ret1,31,32,%ret0 ; for 32-bit, return in ret0/ret1
