Lines Matching refs:regRowid
10329 int regRowid; /* Register holding rowid of CREATE TABLE entry */
73499 int regRowid = iMem++; /* Rowid for the inserted record */
73623 sqlite3VdbeAddOp2(v, OP_NewRowid, iStatCur+1, regRowid);
73624 sqlite3VdbeAddOp3(v, OP_Insert, iStatCur+1, regRec, regRowid);
73699 sqlite3VdbeAddOp2(v, OP_NewRowid, iStatCur, regRowid);
73700 sqlite3VdbeAddOp3(v, OP_Insert, iStatCur, regRec, regRowid);
73719 sqlite3VdbeAddOp2(v, OP_NewRowid, iStatCur, regRowid);
73720 sqlite3VdbeAddOp3(v, OP_Insert, iStatCur, regRec, regRowid);
75701 reg1 = pParse->regRowid = ++pParse->nMem;
75719 ** The rowid for the new entry is left in register pParse->regRowid.
76425 pParse->regRowid
77165 const int regRowid = regIdxKey + pIndex->nColumn;
77178 sqlite3VdbeAddOp4(v, OP_IsUnique, iIdx, j2, regRowid, pRegKey, P4_INT32);
79365 int regRowid; /* Actual register containing rowids */
79372 regRowid = sqlite3ExprCodeGetColumn(pParse, pTab, -1, iCur, iRowid);
79373 sqlite3VdbeAddOp2(v, OP_RowSetAdd, iRowSet, regRowid);
82692 static void autoIncStep(Parse *pParse, int memId, int regRowid){
82694 sqlite3VdbeAddOp2(pParse->pVdbe, OP_MemMax, memId, regRowid);
82894 int regRowid; /* registers holding insert rowid */
83226 regRowid = regIns = pParse->nMem+1;
83229 regRowid++;
83232 regData = regRowid+1;
83316 sqlite3VdbeAddOp3(v, OP_Column, srcTab, keyColumn, regRowid);
83318 sqlite3VdbeAddOp2(v, OP_SCopy, regFromSelect+keyColumn, regRowid);
83321 sqlite3ExprCode(pParse, pList->a[keyColumn].pExpr, regRowid);
83327 pOp->p2 = regRowid;
83337 j1 = sqlite3VdbeAddOp1(v, OP_NotNull, regRowid);
83338 sqlite3VdbeAddOp3(v, OP_NewRowid, baseCur, regRowid, regAutoinc);
83342 sqlite3VdbeAddOp2(v, OP_IsNull, regRowid, j1+2);
83344 sqlite3VdbeAddOp1(v, OP_MustBeInt, regRowid);
83347 sqlite3VdbeAddOp2(v, OP_Null, 0, regRowid);
83349 sqlite3VdbeAddOp3(v, OP_NewRowid, baseCur, regRowid, regAutoinc);
83352 autoIncStep(pParse, regAutoinc, regRowid);
83359 int iRegStore = regRowid+1+i;
83503 ** The regRowid parameter is the index of the register containing (1).
83569 int regRowid, /* Index of the range of input registers */
83587 int regOldRowid = (rowidChng && isUpdate) ? rowidChng : regRowid;
83593 regData = regRowid + 1;
83671 j2 = sqlite3VdbeAddOp3(v, OP_Eq, regRowid, 0, rowidChng);
83673 j3 = sqlite3VdbeAddOp3(v, OP_NotExists, baseCur, 0, regRowid);
83716 regRowid, 0, pTrigger, OE_Replace
83752 sqlite3VdbeAddOp2(v, OP_SCopy, regRowid, regIdx+i);
83757 sqlite3VdbeAddOp2(v, OP_SCopy, regRowid, regIdx+i);
83845 ** A consecutive range of registers starting at regRowid contains the
83855 int regRowid, /* Range of content */
83880 regData = regRowid + 1;
83897 sqlite3VdbeAddOp3(v, OP_Insert, baseCur, regRec, regRowid);
84055 int regData, regRowid; /* Registers holding data and rowid */
84204 regRowid = sqlite3GetTempReg(pParse);
84206 addr1 = sqlite3VdbeAddOp2(v, OP_Rowid, iSrc, regRowid);
84207 addr2 = sqlite3VdbeAddOp3(v, OP_NotExists, iDest, 0, regRowid);
84211 autoIncStep(pParse, regAutoinc, regRowid);
84213 addr1 = sqlite3VdbeAddOp2(v, OP_NewRowid, iDest, regRowid);
84215 addr1 = sqlite3VdbeAddOp2(v, OP_Rowid, iSrc, regRowid);
84219 sqlite3VdbeAddOp3(v, OP_Insert, iDest, regData, regRowid);
84245 sqlite3ReleaseTempReg(pParse, regRowid);
88728 int regRowid;
88735 regRowid = 0;
88737 regRowid = sqlite3GetTempReg(pParse);
88747 sqlite3VdbeAddOp2(v, OP_NewRowid, iParm, regRowid);
88748 sqlite3VdbeAddOp3(v, OP_Insert, iParm, regRow, regRowid);
88755 sqlite3VdbeAddOp4(v, OP_MakeRecord, regRow, 1, regRowid, &p->affinity, 1);
88757 sqlite3VdbeAddOp2(v, OP_IdxInsert, iParm, regRowid);
88789 sqlite3ReleaseTempReg(pParse, regRowid);
94937 ** The VM register number pParse->regRowid holds the rowid of an
94950 pParse->regRowid
99290 int regRowid = 0; /* Register holding rowid */
99340 regRowid = ++pParse->nMem;
99361 regRowid);
